Multi-step programming of heat-sensitive non-volatile memory (NVM) in processor-based systems

A method of programming heat-sensitive non-volatile memory (NVM) in a processor-based system, comprising:

• loading, during fabrication of the processor-based system, a boot loader comprising programming instructions into a first non-volatile memory (NVM) in the processor-based system, wherein the first NVM has a first heat sensitivity;
• executing the programming instructions in the boot loader by a processor for:
• receiving, during fabrication of the processor-based system, a programmed image comprising instructions over a peripheral interface from a first external programming device that is external to the processor-based system and that is communicatively coupled to the peripheral interface;
• and
• loading the received programmed image into a magnetic random access memory (MRAM) to be executed by the processor, wherein the MRAM has a second heat sensitivity that is higher than the first heat sensitivity.

A processor-based system, comprising:

• a processor;
• a peripheral interface configured to exchange data between the processor and an external programming device that is external to the processor-based system and that is communicatively coupled to the peripheral interface;
• and
• a first non-volatile memory (NVM) configured to store, during fabrication of the processor-based system, a lower-level boot loader comprising lower-level programming instructions;
• a non-volatile (NV) instruction memory having a first heat sensitivity, and that is configured to store a higher-level boot loader comprising higher-level programming instructions configured to be executed by the processor to exchange data with the peripheral interface;
• and
• a non-volatile (NV) program memory having a second heat sensitivity that is higher than the first heat sensitivity, and that is configured to store a programmed image comprising program instructions;
• the processor configured to access program instructions stored in the programmed image in the NV program memory and execute the program instructions;
• the processor further configured to:
• execute, during fabrication of the processor-based system, the lower-level programming instructions in the lower-level boot loader in the first NVM to load the higher-level boot loader into the NV instruction memory;
• and
• execute the higher-level programming instructions in the higher-level boot loader in the NV instruction memory to:
• receive, during fabrication of the processor-based system, the programmed image from the peripheral interface from the external programming device communicatively coupled to the peripheral interface;
• and
• load the received programmed image into the NV program memory.

A method of programming heat-sensitive non-volatile memory (NVM) in a processor-based system, comprising:

• loading, during fabrication of the processor-based system, a lower-level boot loader comprising lower-level programming instructions into a first non-volatile memory (NVM) in the processor-based system;
• executing the lower-level programming instructions in the lower-level boot loader in the first NVM by a processor for:
• receiving, during fabrication of the processor-based system, a higher-level boot loader comprising higher-level programming instructions over a peripheral interface from a first external programming device that is external to the processor-based system and that is communicatively coupled to the peripheral interface;
• and
• loading the received higher-level boot loader into a non-volatile (NV) instruction memory, wherein the NV instruction memory has a first heat sensitivity;
• and
• executing the higher-level programming instructions in the higher-level boot loader in the NV instruction memory by a processor for:
• receiving, during fabrication of the processor-based system, a programmed image comprising instructions over the peripheral interface from a second external programming device that is external to the processor-based system and that is communicatively coupled to the peripheral interface;
• and
• loading the received programmed image into a non-volatile (NV) program memory to be executed by the processor, wherein the NV program memory has a second heat sensitivity that is higher than the first heat sensitivity.