Memory protection with non-readable pages
AssigneeIntel Corporation
InventorsRekha N. Bachwani, Ravi L. Sahita, David M. Durham
Life of this patent
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AssigneeIntel Corporation
InventorsRekha N. Bachwani, Ravi L. Sahita, David M. Durham
Estimating the term…
A method includes, in various implementations, regulating a memory region for execute-only access, storing a set of instructions in the memory region, executing an early instruction among the set of instructions, and executing a set of subsequent instructions among the instructions. The early instruction loads a secret value into a volatile register. A correct execution of the subsequent instructions depends on the secret value being loaded into the volatile register. A system includes, in various implementations, a memory and a processor with one or more volatile registers. The processor regulates access to portions of the memory. The processor can load a secret value into the volatile register in response to executing a program stored in an execute-only portion of the memory. The processor is configured to lose, in response to an asynchronous event, information loaded in the volatile registers.
A method of storing computer instructions for execution, the method comprising:
A system for storing computer instructions, the system comprising:
At least one non-transitory, machine-accessible storage medium having instructions stored thereon, wherein the instructions are configured, when executed on a machine, to cause the machine to:
Dependencies are inferred from the claim text.