Input output value prediction with physical or virtual addressing for virtual environment
AssigneeCavium, Inc.
InventorsWilson Parkhurst Snyder, II, Michael Sean Bertone
Life of this patent
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AssigneeCavium, Inc.
InventorsWilson Parkhurst Snyder, II, Michael Sean Bertone
Estimating the term…
Method and system embodying the method for input/output value determination at a processor core, comprising generating an I/O instruction comprising at least a physical or a virtual address; comparing the address with a relevant database of I/O devices addresses. When the comparing is successful determining the I/O device or a state on the I/O device to receive the I/O instruction in accordance with the address; setting a value of a first register to a value identifying the determined I/O device or the state on the I/O device; predicting a value to be set in a second register in accordance with the address; and setting a value of a third register. Providing I/O instruction other than a request I/O instruction to the I/O device or the state on the I/O device, which sets a register to a value according to the I/O instruction and reports the value to the processor core.
A method for input/output (I/O) value determination at a processor core, comprising:
A method for input/output (I/O) value determination at a processor core, comprising:
A apparatus for input/output (I/O) value determination, comprising:
An apparatus for input/output (I/O) value determination, comprising:
Dependencies are inferred from the claim text.