Variable caching structure for managing physical storage

A system for managing a variable caching structure for managing storage for a processor, comprising:

• a multi-way tag array for storing a plurality of pointers for a corresponding plurality of different size groups of physical storage, wherein the plurality of pointers indicate guest addresses that have corresponding converted native addresses stored within the physical storage;
• wherein upon receiving a request for a guest address, the multi-way tag array is accessed to determine whether there exists a pointer in the multi-way tag array that corresponds to the guest address;
• wherein upon a hit on a tag of the multi-way tag array, a corresponding entry is accessed to retrieve the pointer, wherein the pointer indicates a location in the physical storage having native instructions, and the native instructions are accessed from the physical storage for execution.

A microprocessor that implements a method for managing a variable caching structure for managing storage for a processor, the microprocessor comprising:

• a multi-way tag array for storing a plurality of pointers for a corresponding plurality of different size groups of physical storage, wherein the plurality of pointers indicate guest addresses that have corresponding converted native addresses stored within the physical storage;
• wherein upon receiving a request for a guest address, the multi-way tag array is accessed to determine whether there exists a pointer in the multi-way tag array that corresponds to the guest address;
• wherein upon a hit on a tag of the multi-way tag array, a corresponding entry is accessed to retrieve the pointer, wherein the pointer indicates a location in the physical storage having native instructions, and the native instructions are accessed from the physical storage for execution.