Topology-aware processor scheduling

#This document generally relates to methods and systems for use with computer processors. More particularly, in example embodiments, this document relates to the topology-aware scheduling of processor tasks.

#Modern processors such as central processing units (CPUs) support a number of execution units (threads, cores, sockets, etc.). Experimentation with various benchmarks shows that not all execution units have the same efficiency for a given set of tasks. For example, there is a cost for accessing memory across sockets. Additionally, multiple tasks assigned to threads of the same core may be inefficient if other cores are available. By scheduling available execution units onto threads randomly or otherwise in a “dumb” manner, performance is not maximized.

#The present disclosure is illustrated by way of example and not limitation in the following figures.

#FIG. 1 is a block diagram depicting data storage computer system that includes various functional components of a computer system, in accordance with some example embodiments.

#FIG. 2 is a block diagram illustrating a computer system, in accordance with some example embodiments.

#The description that follows includes illustrative systems, methods, techniques, instruction sequences, and computing machine program products that embody illustrative embodiments. In the following description, for purposes of explanation, numerous specific details are set forth in order to provide an understanding of various embodiments of the inventive subject matter. It will be evident, however, to those skilled in the art, that embodiments of the inventive subject matter may be practiced without these specific details. In general, well-known instruction instances, protocols, structures, and techniques have not been shown in detail.

#In an example embodiment, a specialized task scheduler is provided for a processor. This specialized task scheduler considers the topology of the system when making scheduling decisions. This topology may include the layout of cores, memory, sockets, caches, and the like. Use of the knowledge of this topology allows the specialized task scheduler to schedule tasks not only to components that happen to be free but to components that use other components that are free.

#For example, in a system having two sockets, each having two cores with two threads per core, the task scheduler may decide to schedule two tasks such that each task uses its own socket. This way each task can utilize multiple caches that exist at the core and socket level without the need to share those caches with the other task. In an example embodiment, a static policy for topology-aware scheduling could be used in which the nature of the underlying task is ignored or unknown and the topology itself is utilized as the main factor in the scheduling. In another example embodiment, the nature of the task (i.e., the underlying work the task is performing) is analyzed and this nature is compared with the nature of other tasks so it can be used, along with the topology, to schedule the task. For example, if two tasks access the same data it may be more efficient to schedule them so that they are assigned to cores on the same socket so that they can share a cache rather than be assigned to cores on different sockets.