Task processing device implementing task switching using multiple state registers storing processor id and task state
AssigneeRenesas Electronics Corporation
InventorNaotaka Maruyama
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AssigneeRenesas Electronics Corporation
InventorNaotaka Maruyama
Estimating the term…
A plurality of tasks are processed simultaneously in a plurality of CPUs. A task control circuit is connected to the plurality of CPUs, and when executing a system call signal instruction, each CPU transmits a system call signal to the task control circuit. Upon receipt of a system call signal from a CPU 0, the task control circuit 200 refers to a processor management register, identifies a RUN-task of the CPU 0, selects a READY-task that is to be executed next, switches process data of the RUN-task and process data of the READY-task, and updates processor management information.
A task processing device comprising:
Dependencies are inferred from the claim text.
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The resource being a machine, e.g. CPUs, Servers, Terminals: considering the execution order of a plurality of tasks, e.g. taking priority or time…
Multiprogramming arrangements: saving or restoring of program or task context
Task transfer initiation or dispatching: by interrupt, e.g. masked
By program, e.g. task dispatcher, supervisor, operating system: scheduling strategies for dispatcher, e.g. round robin, multi-level priority queues
About 5 years 7 months of term left · ends 24 May 2032 (estimated)
1. Field of the Invention
The present invention relates to a function of Operating System (OS), and more particularly, to an OS compatible with multiprocessor systems.
2. Description of the Related Art
Embodiments will now be described, by way of example only, with reference to the accompanying drawings which are meant to be exemplary, not limiting, and wherein like elements are numbered alike in several Figures, in which:
FIG. 1 is a state transition diagram of a task;
FIG. 2 is a conceptual diagram of a commonly used RTOS;
The task processing device 100 according to the embodiment achieves task scheduling and exclusive control in a MP system by an electronic circuit, so as to improve the processing efficiency thereof. First, the task processing device 100 that implements task scheduling of an SP system by an electronic circuit will be described as a “basic exemplary embodiment”. Then a method of implementing a virtual queue algorithm will be described as an “exemplary embodiment implementing a virtual queue,” and a method of implementing an interrupt process primarily under the control of hardware will be described as an “exemplary embodiment implementing an HW interrupt.” After the explanations on the above three exemplary embodiments, an explanation on the task processing device 100 intended for a MP system will be given as an “exemplary embodiment implementing an MP.” Hereinafter, the term “the embodiment” will basically refer to the “basic exemplary embodiment,” the “exemplary embodiment implementing a virtual queue,” the “exemplary embodiment implementing an HW interrupt” and the “exemplary embodiment implementing an MP” as a whole.
[Basic Exemplary Embodiment (SP System)]
A task processing device 100 according to an embodiment of the present invention implements the task scheduling function of a multitask OS by an electronic circuit. Before describing the details of the task processing device 100, a description will be given of state transition of a task with reference to FIG. 1. The description hereunder is directed to state transition of a task in a commonly used multitask OS. However, the illustration is equally applicable to state transition of a task in the task processing device 100. An overview of a system call executed in the task processing device 100 will also be given. The design concept of a commonly used multitask OS will be described with reference to FIGS. 2 and 3 and the method of processing in the task processing device 100 according to the embodiment will be described in detail with reference to FIGS. 4 through 10. The features of the task processing device 100 in connection with processes related to semaphores, mutexes, and events will also be discussed by comparing the inventive features with the technology commonly used.