Non-volatile memory device having a memory size
AssigneeSTMicroelectronics (Rousset) SAS
InventorsFrançois Tailliet, Marc Battista
Life of this patent
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Abstract
A memory device includes an input/output interface, a bus of SPI type coupled to the input/output interface, and a plurality of individual non-volatile memory devices connected to the bus of SPI type. The chip select inputs of each individual memory device are all connected to one and the same chip select wire of the SPI bus. The individual memory devices are further configured and controllable so as to behave, as seen by the input/output interface, as a single non-volatile memory device, the total memory space of which has a total memory capacity equal to the sum of the individual memory capacities of the individual devices.
Claims26
A memory device, comprising:
- an input/output interface;
- a serial peripheral interface (SPI) bus coupled to the input/output interface;
- and
- a plurality of individual non-volatile memory devices connected to the bus, each individual non-volatile memory device having an individual memory space with an individual memory capacity, wherein chip select inputs of each individual memory device are all connected to one and the same chip select wire of the SPI bus, the individual memory devices being further connected and controllable so as to behave, as seen by the input/output interface, as a single non-volatile memory device having a total memory space with a total memory capacity equal to the sum of the individual memory capacities of the individual devices.
A method of operating a non-volatile memory device that includes a plurality of individual non-volatile memory chips connected to a serial peripheral interface (SPI) bus that is coupled to an input/output interface, the method comprising:
- activating a chip select line of the SPI bus with a chip select signal, the chip select line being commonly connected to chip select inputs of each of the individual non-volatile memory chips;
- placing each individual non-volatile memory chip in a selected state in response to the chip select signal;
- receiving a memory access command at the input/output interface of the non-volatile memory device;
- transmitting the memory access command to each of the individual non-volatile memory chips;
- executing or not executing the memory access command by each individual non-volatile memory chip as a function a content of the memory access command;
- deactivating the chip select line of the SPI bus with a chip deselect signal;
- and
- placing each individual non-volatile memory chip in a deselected state in response to the chip deselect signal.
A method of operating a memory device that includes a plurality of individual non-volatile memory devices connected to a serial peripheral interface (SPI) bus that is coupled to an input/output interface, the method comprising:
- receiving a write command at the input/output interface of the non-volatile memory device;
- activating a chip select line of the SPI bus, the chip select line being commonly connected to chip select inputs of each of the individual non-volatile memory devices;
- decoding the write command at each of the individual non-volatile memory devices;
- and
- executing the write command by all the individual non-volatile memory devices or not executing the write command by any of the individual non-volatile memory devices based on bits of a status word stored in a virtual status register of each of individual non-volatile memory devices.
Dependencies are inferred from the claim text.