Chip-to-chip signaling link timing calibration

An integrated circuit device that outputs data values during respective transmit intervals defined by transitions of a transmit clock signal, the integrated circuit device comprising:

• transmit timing circuitry to shift the phase of the transmit clock signal by half a transmit interval to enable a timing calibration operation;
• data output circuitry to transmit a sequence of data values to another integrated circuit device in response to the transmit clock signal after the transmit timing circuitry has shifted the phase of the transmit clock signal;
• data receive circuitry to receive a plurality of samples of the sequence of data values from the other integrated circuit device;
• and
• calibration circuitry to:
• compare the plurality of samples with the sequence of data values to determine a phase update value, including comparing at least one sample of the plurality of samples with two adjacent data values within the sequence of data values;
• and
• incrementally advance or retard the phase of the transmit clock signal according to the phase update value.

An integrated circuit device that outputs data values during respective transmit intervals defined by transitions of a transmit clock signal, the integrated circuit device comprising:

• means for shifting the phase of the transmit clock signal by half a transmit interval to enable a timing calibration operation;
• means for transmitting a sequence of data values to another integrated circuit device in response to the transmit clock signal after shifting the phase thereof;
• means for receiving a plurality of samples of the sequence of data values from the other integrated circuit device;
• means for comparing the plurality of samples with the sequence of data values to determine a phase update value, including comparing at least one sample of the plurality of samples with two adjacent data values within the sequence of data values;
• and
• means for incrementally advancing or retarding the phase of the transmit clock signal according to the phase update value.