Method, apparatus, and system for energy efficiency and energy conservation by mitigating performance variations between integrated circuit devices
AssigneeIntel Corporation
InventorsRyan D. Wells, Avinash N. Ananthakrishnan, Efraim Rotem, Doron Rajwan, Gary A. Andrew
Life of this patent
Estimating the term…
Abstract
According to one embodiment of the invention, an integrated circuit device comprises one or more processor cores and a control unit coupled to the processor core(s). The control unit is adapted to control an operating frequency of at least one processor core based on an estimated activity level in lieu of a power level. The estimated activity level differing from an estimated power level by being independent of leakage power and voltage characteristics particular to that integrated circuit device.
Claims16
An integrated circuit device comprising:
- at least one processor core;
- and
- a control unit coupled to the at least one processor core, the control unit to control an operating setting for the integrated circuit device by controlling an operating frequency of the at least one processor core based on an estimated activity level and an activity limit, the estimated activity level being independent of leakage power and voltage characteristics particular to the integrated circuit device, wherein the estimated activity level is based on a number of events of particular types detected upon which weighting factors have been applied depending on the complexity and amount of processing needed for a type of instruction, one of these events being a number of clock cycles and one of these events being a count of a number of different types of instructions executed, wherein the control unit is to determine a limit in the operating frequency by comparing the estimated activity level to the activity limit for a stock-keeping unit (SKU) in which the integrated circuit device is assigned, wherein the activity limit of the SKU guarantees that the integrated circuit device will stay within a power budget.
An electronic device comprising:
- a housing;
- a display unit including a liquid crystal display;
- and
- an integrated circuit device implemented with the housing, the integrated circuit device comprises at least one processor core, and a control unit coupled to the at least one processor core, the control unit to control an operating setting for the integrated circuit device by controlling an operating frequency of at least one compute engine of the at least one processor core based on an estimated activity level, the estimated activity level differing from an estimated power level by being independent of leakage power and voltage characteristics particular to the integrated circuit device, wherein the estimated activity level utilized by the integrated circuit device is based on a count of a number of different types of instructions executed upon which weighting factors have been applied depending on the complexity and amount of processing needed for the type of instruction, wherein the control unit to determine a maximum increase in the operating frequency by comparing the estimated activity level to an activity limit for a stock-keeping unit (SKU) in which the integrated circuit device is assigned, wherein the activity limit of the SKU guarantees that the integrated circuit device will stay within a power budget.
A method comprising:
- calculating an estimated activity level for an integrated circuit device based on a count of detected events of particular types and weightings applied to the detected events based on the complexity and amount of processing needed for a type of instruction, wherein one type of detected event is a count of a number of different types of instructions executed;
- determining an activity budget for the integrated circuit device over a selected period of time for use in power conservation using the estimated activity level;
- determining an operating state for the integrated circuit device based on the activity budget, the operating state being used to determine a frequency, and voltage operating point for the integrated circuit device;
- and
- determining a maximum increase in the operating frequency by comparing the estimated activity level to an activity limit for a stock-keeping unit (SKU) in which the integrated circuit device is assigned, wherein the activity limit of the SKU guarantees that the integrated circuit device will stay within a power budget.
Dependencies are inferred from the claim text.