# US 9,753,472 B2 · LDO life extension circuitry

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- Number: US 9,753,472 B2
- Document ID: US9753472B2
- Status: Granted
- Kind: B2
- Application number: 14/827,239
- Filed: 2015-08-14
- Published: 2017-02-16
- Granted: 2017-09-05
- Earliest claimed: 2015-08-14
- Assignees: QUALCOMM Incorporated
- Applicants: QUALCOMM Incorporated
- Inventors: Burt Lee Price; Dhaval Rajeshbhai Shah; Jonathan Liu
- Web page: https://patentgrep.com/patent/US9753472B2

## CPC

- G05F 1/56: using semiconductor devices in series with the load as final control devices (G05F1/461 takes precedence)
- G05F 1/565: sensing a condition of the system or its load in addition to means responsive to deviations in the output of the system, e.g. current, voltage, power factor (G05F1/563 takes precedence)
- G05F 1/575: characterised by the feedback circuit
- G05F: SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES

## Abstract

Systems and methods relate to extending life of a low-dropout (LDO) voltage regulator. A differential amplifier of the LDO voltage regulator includes switches that can be selectively turned on or off. When the LDO voltage regulator is bypassed or turned off (or not active), a first switch is turned on to selectively couple gates of a first input transistor and a second input transistor of the differential amplifier, to maintain the gates at a same voltage. The first switch is turned off to decouple the gates when the LDO voltage regulator is active. Further, a second switch can be turned on or off to selectively couple or decouple, respectively, the gate of the second input transistor to an output voltage of the LDO voltage regulator, based on whether the LDO voltage regulator is active or not active, respectively.

## Claims

### Claim 1

A low-dropout (LDO) voltage regulator comprising:
a differential amplifier comprising a first input transistor and a second input transistor;
a first switch to selectively couple a gate of the first input transistor and a gate of the second input transistor when the LDO voltage regulator is not active; and
a second switch to decouple the gate of the second input transistor from an output voltage of the LDO voltage regulator when the LDO voltage regulator is not active, and directly connect the gate of the second input transistor to the output voltage of the LDO voltage regulator when the LDO voltage regulator is active.

### Claim 2 (depends on 1)

The LDO voltage regulator of claim 1, wherein the first switch is further configured to decouple the gate of the first input transistor from the gate of the second input transistor when the LDO voltage regulator is active.

### Claim 3 (depends on 1)

The LDO voltage regulator of claim 1, wherein the first switch and the second switch comprise a first transmission gate and a second transmission gate, respectively.

### Claim 4 (depends on 1)

The LDO voltage regulator of claim 1, wherein the LDO voltage regulator is bypassed or turned off when the LDO voltage regulator is not active.

### Claim 5 (depends on 1)

The LDO voltage regulator of claim 1, wherein the gate of the first input transistor is coupled to a reference voltage.

### Claim 6 (depends on 1)

The LDO voltage regulator of claim 1, wherein threshold voltages of the first and second input transistors are substantially equal when the LDO voltage regulator is not active.

### Claim 7

A method of extending life of a low-dropout (LDO) voltage regulator, the method comprising:
turning on a first switch to selectively couple a gate of a first input transistor of a differential amplifier of the LDO voltage regulator and a gate of a second input transistor of the differential amplifier, when the LDO voltage regulator is not active;
turning off a second switch to decouple the gate of the second input transistor from an output voltage of the LDO voltage regulator when the LDO voltage regulator is not active; and
turning on the second switch to directly connect the gate of the second input transistor to the output voltage of the LDO voltage regulator when the LDO voltage regulator is active.

### Claim 8 (depends on 7)

The method of claim 7, further comprising turning off the first switch to decouple the gate of the first input transistor from the gate of the second input transistor when the LDO voltage regulator is active.

### Claim 9 (depends on 7)

The method of claim 7, comprising bypassing or turning off the LDO voltage regulator when the LDO voltage regulator is not active.

### Claim 10 (depends on 7)

The method of claim 7, comprising coupling the gate of the first input transistor to a reference voltage.

### Claim 11 (depends on 7)

The method of claim 7, wherein threshold voltages of the first and second input transistors are substantially equal when the LDO voltage regulator is not active.

### Claim 12

An apparatus comprising:
means for amplifying;
means for selectively coupling a gate of a first input transistor of the means for amplifying and a gate of a second input transistor of the means for amplifying, when the apparatus is not active;
means for decoupling the gate of the second input transistor from an output voltage of the apparatus when the apparatus is not active; and
means for directly connecting the gate of the second input transistor to the output voltage of the apparatus when the apparatus is active.
