# US 9,751,750 B2 · MEMS pressure sensor with thermal compensation

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- Number: US 9,751,750 B2
- Document ID: US9751750B2
- Status: Granted
- Kind: B2
- Application number: 14/711,766
- Filed: 2015-05-13
- Published: 2016-01-14
- Granted: 2017-09-05
- Earliest claimed: 2014-06-03
- Assignees: Semiconductor Manufacturing International (Shanghai) Corporation
- Applicants: Semiconductor Manufacturing International (Shanghai) Corporation
- Inventors: Xianming Zhang; Guangcai Fu
- Web page: https://patentgrep.com/patent/US9751750B2

## CPC

- B81B 3/0081: {Thermal properties}
- G01L 9/0047: {Diaphragm with non uniform thickness, e.g. with grooves, bosses or continuously varying thickness}
- G01L 9/0048: {Details about the mounting of the diaphragm to its support or about the diaphragm edges, e.g. notches, round shapes for stress relief}
- G01L 9/005: {Non square semiconductive diaphragm}
- G01L 9/0073: {using a semiconductive diaphragm}
- G01L 19/04: Means for compensating for effects of changes of temperature {, i.e. other than electric compensation}
- B81B 2201/0264: Pressure sensors
- B81B: MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES (piezoelectric, electrostrictive or magnetostrictive elements per se H10N30/00, H10N35/00)
- G01L: MEASURING FORCE, STRESS, TORQUE, WORK, MECHANICAL POWER, MECHANICAL EFFICIENCY, OR FLUID PRESSURE (weighing G01G)

## Abstract

A semiconductor device having a capacitive pressure sensor structure includes a substrate, an interlayer dielectric layer on the substrate, a bottom electrode of a pressure sensor within the interlayer dielectric layer, a pressure sensing cavity above the bottom electrode, a sensing film above the pressure sensing cavity and covering a portion of the interlayer dielectric layer, a cover layer on the interlayer dielectric layer and on the sensing film, the cover layer having an opening exposing a portion of the sensing film, and a high thermal expansion coefficient material layer disposed on cover layer and sidewalls of the opening. Through the use of the high thermal expansion coefficient material layer, the capacitive pressure sensor structure is not susceptible to changes in ambient temperature to enhance the sensitivity of the capacitive pressure sensor structure.

## Claims

### Claim 1

A semiconductor device comprising:
a substrate;
an interlayer dielectric layer on the substrate;
a bottom electrode of a pressure sensor within the interlayer dielectric layer;
a pressure sensing cavity above the bottom electrode;
a sensing film above the pressure sensing cavity and covering a portion of the interlayer dielectric layer;
a cover layer on the interlayer dielectric layer and on the sensing film, the cover layer having an opening exposing a portion of the sensing film;
a high thermal expansion coefficient material layer disposed on the cover layer and sidewalls of the opening while leaving a central portion of the opening uncovered so that a central portion of the exposed portion of the sensing film remains exposed, the high thermal expansion coefficient material layer having a high thermal expansion coefficient higher than a thermal expansion coefficient of the sensing film, wherein the exposed central portion is not covered by any other layer.

### Claim 2 (depends on 1)

The semiconductor device of claim 1, wherein the sensing film comprises silicon or silicon germanium.

### Claim 3 (depends on 1)

The semiconductor device of claim 1, wherein the high thermal expansion coefficient material layer is disposed in the vicinity of a peripheral edge of the sensing film.

### Claim 4 (depends on 1)

The semiconductor device of claim 1, wherein the high thermal expansion coefficient material layer is distributed in an annular form around a peripheral edge of the sensing film.

### Claim 5 (depends on 1)

The semiconductor device of claim 1, wherein the thermal expansion coefficient of the high thermal expansion coefficient material layer is greater than 5.0 ppm/K.

### Claim 6 (depends on 1)

The semiconductor device of claim 1, wherein the high thermal expansion coefficient material layer comprises a metal material.

### Claim 7 (depends on 6)

The semiconductor device of claim 6, wherein the metal material comprises aluminum.

### Claim 8 (depends on 1)

The semiconductor device of claim 1, wherein the high thermal expansion coefficient material layer has a thickness smaller than a thickness of the sensing film.

### Claim 9 (depends on 1)

The semiconductor device of claim 1, further comprising:
a device in the substrate; and
an interconnect structure disposed on an outer periphery of the bottom electrode and comprising a first terminal connected to the device and a second terminal opposite the first terminal and connected to the sensing film.

### Claim 10 (depends on 9)

The semiconductor device of claim 9, wherein the interconnect structure comprises a plurality of metal layers connected to each other through a plurality of vias.

### Claim 11 (depends on 10)

The semiconductor device of claim 10, wherein the plurality of metal layers are made of aluminum, and the plurality of vias are made of tungsten.

### Claim 12

An electronic device comprising a semiconductor device, the semiconductor device comprising:
a substrate;
an interlayer dielectric layer on the substrate;
a bottom electrode of a pressure sensor within the interlayer dielectric layer;
a pressure sensing cavity above the bottom electrode;
a sensing film above the pressure sensing cavity and covering a portion of the interlayer dielectric layer;
a cover layer on the interlayer dielectric layer and on the sensing film, the cover layer having an opening exposing a portion of the sensing film;
a high thermal expansion coefficient material layer disposed on the cover layer and sidewalls of the opening while leaving a central portion of the opening uncovered so that a central portion of the exposed portion of the sensing film remains exposed, the high thermal expansion coefficient material layer having a high thermal expansion coefficient higher than a thermal expansion coefficient of the sensing film, wherein the exposed central portion is not covered by any other layer.
