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US 9,741,626 B1Granted
Vertical transistor with uniform bottom spacer formed by selective oxidation
AssigneeInternational Business Machines Corporation
InventorsKangguo Cheng, Nicolas J. Loubet, Xin Miao, Alexander Reznicek
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Abstract
A method of forming a vertical transistor includes forming at least one fin on stacked layers. The stacked layers include a substrate, a doped silicon layer, and an intrinsic layer interposed between the pair of fins and the substrate. The method further includes forming a spacer hardmask over the pair of fins, and forming a bottom spacer. Forming the bottom spacer includes selective oxidation of the SiGe layer.
Claims8
A method of forming a vertical transistor, the method comprising:
- forming at least one fin on stacked layers comprising a substrate, a doped silicon layer, and an intrinsic layer interposed between the at least one fin and the substrate;
- forming a spacer hardmask over the at least one fin;
- and
- forming a bottom spacer, wherein forming the bottom spacer comprises selective oxidation of the intrinsic layer;
- opening a plurality of gate trenches surrounding the two or more fins;
- and
- forming a metal gate stack in each of the plurality of gate trenches
- wherein forming the metal gate stack comprises:
- recessing a top portion of the metal gate stack;
- forming a top spacer;
- and
- forming a top source or drain (S/D) region on the top spacer.
9 more elements
Dependencies are inferred from the claim text.