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US 9,728,652 B2Granted
Sensor device and method
AssigneeInfineon Technologies AG
InventorsKlaus Elian, Franz-Peter Kalz, Horst Theuss
Life of this patent
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Abstract
A sensor device includes a semiconductor chip. The semiconductor chip has a sensing region sensitive to mechanical loading. A pillar is mechanically coupled to the sensing region.
Claims18
A sensor device comprising:
- a semiconductor chip having at least one sensing region sensitive to a mechanical loading, the at least one sensing region being located in a bulk part of the semiconductor chip adjacent to an upper surface of the semiconductor chip, wherein a transistor having a channel region is embedded in the at least one sensing region;
- and
- at least one pillar fixedly secured to the bulk part of the semiconductor chip at the at least one sensing region, the at least one pillar being arranged on the upper surface of the semiconductor chip directly above the at least one sensing region, wherein the at least one pillar has an aspect ratio between 5 and 40, and wherein the at least one pillar is configured to mechanically introduce an external stress generated by a forced lateral deflection of the at least one pillar into the channel region of the transistor which induces a deformation in a semiconductor lattice in the channel region which varies an electrical characteristic of the channel region.
A method of manufacturing a sensor device, the method comprising:
- providing a semiconductor chip having at least one sensing region sensitive to mechanical loading, the at least one sensing region being located in a bulk part of the semiconductor chip adjacent to an upper surface of the semiconductor chip, wherein a transistor having a channel region is embedded in the at least one sensing region;
- depositing a material over at least a part of the upper surface of the semiconductor chip, the part of the upper surface comprising the at least one sensing region;
- and
- structuring the material thereby forming at least one pillar fixedly secured to the bulk part of the semiconductor chip at the at least one sensing region, wherein the at least one pillar is arranged on the upper surface of the semiconductor chip directly above the at least one sensing region so as to mechanically introduce an external stress generated by a forced lateral deflection of the at least one pillar into the channel region of the transistor which induces a deformation in a semiconductor lattice in the channel region which varies an electrical characteristic of the channel region, and wherein the at least one pillar has an aspect ratio between 5 and 40.
1 more element
Dependencies are inferred from the claim text.