Bi-synchronous electronic device with burst indicator and related methods

A bi-synchronous electronic device comprising:

• a first-in-first-out (FIFO) memory circuit configured to store data and comprising processing circuitry, and a memory core coupled to said processing circuitry;
• a first digital circuit coupled to said FIFO memory circuit and configured to
• operate based upon a first clock signal and a write pointer,
• write a data burst to said memory core of said FIFO memory circuit, thereby causing a jump in the write pointer to a new position, the jump in the write pointer to the new position comprising a non-consecutive jump from a current position,
• write at a plurality of locations in said FIFO memory circuit in a single clock cycle of the first clock signal, and
• write a burst indicator to said memory core of said FIFO memory circuit, the burst indicator being associated with the new position in said FIFO memory circuit;
• and
• a second digital circuit coupled to said FIFO memory circuit and configured to
• operate based upon a second clock signal different from the first clock signal,
• read from said FIFO memory circuit based upon a read pointer, and
• synchronize the read pointer to the write pointer based upon the burst indicator.

A method of operating a bi-synchronous electronic device comprising a first-in-first-out (FIFO) memory circuit comprising processing circuitry, and a memory core coupled to the processing circuitry, the method comprising:

• using a first digital circuit coupled to the FIFO memory circuit to
• operate based upon a first clock signal and a write pointer,
• write a data burst to the memory core of the FIFO memory circuit, thereby causing a jump in the write pointer to a new position, and
• write a burst indicator to the memory core of the FIFO memory circuit, the burst indicator being associated with the new position in the FIFO memory circuit;
• and
• using a second digital circuit coupled to the FIFO memory circuit to
• operate based upon a second clock signal different from the first clock signal,
• read from the FIFO memory circuit based upon a read pointer, and
• synchronize the read pointer to the write pointer based upon the burst indicator.