Implementing resistance defect performance mitigation using test signature directed self heating and increased voltage
AssigneeInternational Business Machines Corporation
InventorsKarl R. Erickson, Phil C. Paone, David P. Paulsen, John E. Sheets, II, Gregory J. Uhlmann
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Abstract
A method and system are provided for implementing resistive defect performance mitigation for integrated circuits. A test is generated for identifying resistive defects. A first self heating repair process is performed for repairing resistive defects. Testing is performed to identify a mitigated resistive defect and a functional integrated circuit. Responsive to identifying a resistive defect not being mitigated and a functional integrated circuit, a second repair process is performed, then testing is performed again.
Claims11
A computer system for implementing resistive defect performance mitigation for integrated circuits comprising:
- a processor;
- a test generator;
- a resistive defect performance mitigation control;
- said processor using said test generator and said resistive defect performance mitigation control to implement resistive defect performance mitigation for a sample integrated circuits;
- said processor using said test generator for identifying resistive defects;
- said processor using said resistive defect performance mitigation control for performing a first self heating repair process for repairing resistive defects;
- said processor using said test generator for performing testing to identify a mitigated resistive defect and a functional integrated circuit;
- and
- said processor using said resistive defect performance mitigation control responsive to identifying a resistive defect not being mitigated and a functional integrated circuit, for performing a second repair process, and repeating testing to identify a mitigated resistive defect and a functional integrated circuit.
Dependencies are inferred from the claim text.