Conductive polymer electronic devices with surface mountable configuration and methods for manufacturing same

A method of manufacturing a surface-mountable polymer PTC device (170), comprising:

• (a) forming a matrix of surface-mountable electronic devices by:
• (i) laminating an active polymer layer (172a) between first and second metal foil layers;
• (ii) removing a portion of the first foil layer to form an array of first electrodes (174a) and removing a portion of the second foil layer to form an array of second electrodes (174b), thereby forming a first active conductive polymer laminated sheet structure;
• (iii) laminating a second active polymer layer (172b) between third and fourth metal foil layers;
• (iv) removing a portion of the third metal foil layer to form an array of third electrodes (174c) and removing a portion of the fourth metal foil layer to form an array of fourth electrodes (174d), thereby forming a second active conductive polymer laminated sheet structure;
• (v) laminating the first and second laminated sheet structures together with a first insulation layer (180) to form a multiple active layer laminated structure;
• (vi) applying a second insulation layer (182) on the first electrodes (174a);
• (vii) applying a third insulation layer (184) on the array of fourth electrodes (174d);
• (viii) applying a first metallization layer on the second insulation layer (182);
• (ix) applying a second metallization layer on the third insulation layer (184);
• (x) forming a first array of metallized vias (192), each having metallization connecting one of the second electrodes (174b) and third electrodes (174c) to the first and second metallization layers, each of the first array of metallized vias being isolated from one of the first electrodes (174a) by a portion (176a) of the second insulation layer (182) and isolated from one of the fourth electrodes (174d) by a portion (176b) of the third insulation layer (184);
• and forming a second array of metallized vias (194), each having metallization connecting one of the first electrodes (174a) and one of the fourth electrodes (174d) to the first and second metallization layers, each of the second array of metallized vias being isolated from one of the second electrodes (174b) by a portion (178a) of the first insulation layer (180) and isolated from one of the third electrodes (174c) by a portion (178b) of the first insulation layer (180);
• (xi) removing part of the second metallization layer to form an array of first surface mount terminals (186) each physically connected to the first array of metallized vias (192) and a second array of surface mount terminals (188) each physically connected to the second array of metallized vias (194), each of the first surface mount terminals being electrically connected by one of the first array of metallized vias (192), to the second electrode (174b) and the third electrode (174c) and isolated by a portion (176a) of the second insulation layer (182) from the first electrode (174a) and isolated by a portion (176b) of the third insulation layer (184) from the fourth electrode (174d) and each of the second surface mount terminals being electrically connected by one of the second array of metallized vias (194) to the first electrode (174a) and the fourth electrode (174d) and isolated by a portion (178a) of the first insulation layer (180) from the second electrode (174b) and isolated by a portion (178b) of the first insulation layer (180) from the third electrode (174c);
• wherein the portion (176a) of the second insulation layer (182) separating the first array of metallized vias (192) from the first electrodes (174a) comprises a first isolation area, and the portion (176b) of the third insulation layer (184) separating the first array of metallized vias (192) from the fourth electrode (174d) comprises a second isolation area, and the portion (178a) of the first insulation layer (180) separating the second array of metallized vias (194) from the second electrodes (174b) comprises a third isolation area, and the portion (178b) of the first insulation layer (180) separating the second array of metallized vias (194) from the third electrode (174c) comprises a fourth isolation area;
• and wherein the first isolation area (176a) is configured as a first lateral band spaced from the first array of metallized vias (192) by a first metal area (177a), and the second isolation area (176b) is configured as a second lateral band spaced from the first array of metallized vias (192) by a second metal area (177b), and the third isolation area (178a) is configured as a third lateral band spaced from the second array of metallized vias (194) by a third metal area (181a), and the fourth isolation area (178b) is configured as a fourth lateral band spaced from the second array of metallized vias (194) by a fourth metal area (181b);
• and removing at least a portion of the first metallization layer adjacent to each of the first and second arrays of metallized vias (192, 194);
• and
• (b) singulating the matrix into a plurality of individual surface-mountable electronic devices (170), each of the devices including a first cross-conductor (196) defined by one of the metallized vias (192) in the first array of metallized vias, a second cross-conductor (198) defined by one of the metallized vias (194) in the second array of metallized vias, a first surface mount terminal (186) in physical contact with the first cross-conductor (196), and a second surface mount terminal (188) in physical contact with the second cross-conductor (198);
• wherein each of the first cross-conductors (196) is in physical contact with one of the second electrodes (174b), and in physical contact with one of the third electrodes (174c), and is isolated from one of the first electrodes (174a) by the portion (176a) of the second insulation layer (182) configured as a first lateral band spaced from the first cross-conductors (196) by a first metal area (177a), and is isolated from one of the fourth electrodes (174d) by the portion (176b) of the third insulation layer (184) configured as a second lateral band spaced from the first cross-conductors (196) by a second metal area (177b), and wherein each of the second cross-conductors (198) is in physical contact with one of the first electrodes (174a), and in physical contact with one of the fourth electrodes (174d), and is isolated from one of the second electrodes (174b) by the portion (178a) of the first insulation layer (180) configured as a third lateral band spaced from the second cross-conductors (198) by a third metal area (181a), and is isolated from one of the third electrodes (174c) by the portion (178b) of the first insulation layer (180) configured as a fourth lateral band spaced from the second cross-conductors (198) by a fourth metal area (181b).

A method of manufacturing a matrix of surface-mountable electronic devices (1070), comprising:

• (a) forming a matrix of surface-mountable electronic devices by:
• (i) laminating a first conductive polymer substrate (1072a) between first and second metal foil layers;
• (ii) removing a portion of the first metal foil layer to form an array of first electrodes (1074a) and removing a portion of the second metal foil layer to form an array of second electrodes (1074b), thereby forming a first laminated sheet structure;
• (iii) laminating a second conductive polymer substrate (1072b) between third and fourth metal foil layers;
• (iv) removing a portion of the third metal foil layer to form an array of third electrodes (1074c) and removing a portion of the fourth metal foil layer to form an array of fourth electrodes (1074d), thereby forming a second laminated sheet structure;
• (v) laminating a third conductive polymer substrate (1072c) between fifth and sixth metal foil layers;
• (vi) removing a portion of the fifth metal foil layer to form an array of fifth electrodes (1074e) and removing a portion of the sixth metal foil layer to form an array of sixth electrodes (10740, thereby forming a third laminated sheet structure;
• (vi) laminating the first and second laminated sheet structures together with a first insulation layer (1080a), and laminating the second and third laminated sheet structures together with a second insulation layer (1080b) to form a multiple layer laminated structure;
• (vii) applying a third insulation layer (1082) and a fourth insulation layer (1084) on the arrays of first and sixth electrodes (1074a, 10740, respectively;
• (viii) applying first and second metallization layers on the third and fourth insulation layers (1082, 1084) respectively;
• (ix) forming a first array of metallized vias (1092) each having metallization connecting the second, third, and sixth electrodes (1074b, 1074c, 10740 to the first and second metallization layers and forming a second array of metallized vias (1094) each having metallization connecting the first, fourth, and fifth electrodes (1074a, 1074d, 1074e) to the first and second metallization layers, the second array of metallized vias (1094) defining metallized beveled or chamfered entry holes (1102) extending through the third insulation layer (1082);
• (x) removing part of the second metallization layer to form an array of first surface mount terminals (1086) electrically connected to the first array of metallized vias (1092) and an array of second surface mount terminals (1088) electrically connected to the second array of metallized vias (1094), each of the first and second surface mount terminals being connected to three of the electrodes and isolated by portions of the first, second, third, and fourth insulation layers from the other three electrodes;
• and
• (xi) removing a portion of the first metallization layer so as to leave an array of metallized anchor pads (1100) on the third insulation layer (1082) spaced from the beveled or chamfered entry hole and in physical contact with the first array of metallized vias (1092),
• (b) singulating the matrix into a plurality of individual surface-mountable electronic devices (1070), each of the devices including a first cross-conductor (1096) defined by one of the metallized vias (1092) in the first array of metallized vias, a second cross-conductor (1098) defined by one of the metallized vias (1094) in the second array of metallized vias, a first surface mount terminal (1086) in physical contact with the first cross-conductor (1096), and a second surface mount terminal (1088) in physical contact with the second cross-conductor (1098);
• wherein each of the first cross-conductors (1096) is in physical contact with the second electrode (1074b), third electrode (1074c) and sixth electrodes (1074f), and the first terminal (1086) and is separated from the first electrode (1074a) by first portion 1076a of the third insulation layer (1082) and separated from the fourth electrode (1074d) and separated from the fifth electrode (1074e) by portions (1078c, 1078d) of the second insulation layer (1080b) and wherein each of the second cross-conductors (1098) is in physical contact with the first electrodes (1074a), the fourth electrode (1074d), the fifth electrode (1074e) and the second terminal (1088), and separated from the second electrode (1074b) and the third electrode (1074c) by portions (1078a, 1078b) of the first insulation layer (1080a), and separated from the sixth electrode (10740 by a portion (1076b) of the fourth insulation layer (1084);
• and wherein the first cross-conductor (1096) is in physical contact with a metallized anchor pad (1100) on the third insulation layer (1082), and the second cross-conductor (1098) includes a metallized beveled or chamfered portion (1102) extending through the third insulation layer (1082).