System and method for performing synchronization and interference rejection in super regenerative receiver (SRR)

A system for performing pulse synchronization in a super regenerative receiver (SRR), the system comprising:

• a processor;
• and
• a memory coupled to the processor and configured to store instructions that, when executed by the processor, cause the processor to implement a setter, an acquirer, a computer, and an identifier;
• wherein the setter is configured to set a quench rate of the SRR to a value of 1.5 times a chip rate of an incoming signal;
• the acquirer is configured to acquire an expected preamble sequence of an arbitrary sample set among a plurality of possible sample sets, and acquire an expected start frame delimiter (SFD) sequence for of the all possible sample sets to achieve frame synchronization;
• the computer is configured to compute respective correlation metrics for bits of the expected SFD sequence while the expected SFD sequence is acquired for all of the possible sample sets, and calculate a decision metric based on the correlation metrics in response to an SFD sequence being detected for one or more of the possible sample sets;
• and
• the identifier is configured to identify a best sample set for demodulating the incoming signal among all of the possible sample sets based on the decision metric to achieve pulse synchronization.