Overlapping precharge and data write
AssigneeQUALCOMM Incorporated
InventorsSonia Ghosh, Changho Jung
Life of this patent
Estimating the term…
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AssigneeQUALCOMM Incorporated
InventorsSonia Ghosh, Changho Jung
Estimating the term…
A memory includes a plurality of memory cells and a plurality of bitlines. Each of the plurality of bitlines is coupled to a corresponding one of the plurality of memory cells. A precharge circuit precharges each of the plurality of bitlines before a read operation and precharges all but one of the plurality of bitlines following the read operation. A write driver drives the one of the plurality of bitlines following the read operation. A method includes precharging each of a plurality of bitlines before a read operation. Each of the plurality of bitlines is coupled to a corresponding one of a plurality of memory cells. The method further includes precharging all but one of the plurality of bitlines following the read operation and driving the one of the plurality of bitlines following the read operation.
A memory, comprising:
A method to operate a memory, comprising:
A memory, comprising:
Dependencies are inferred from the claim text.