Semiconductor device and method including an intertial mass element

A semiconductor device comprising:

• a stack of patterned metal layers separated by dielectric layers, the dielectric layers having a first plurality of conductive vias that connect metal layers adjacent to the dielectric layers, the stack comprising:
• a first conductive support structure having a first metal layer and a second conductive support structure having a second metal layer;
• a cavity between the first conductive support structure and the second conductive support structure;
• an inertial mass element having at least one metal portion which is vertically displaced with respect to the first metal layer and the second metal layer;
• and
• a first plurality of conductive connection vias that conductively couple the inertial mass element to the first metal layer and the second metal layer, wherein at least one of the first plurality of conductive connection vias is configured to break upon the inertial mass element being exposed to an acceleration force exceeding a threshold defined by dimensions of the first plurality of conductive connection vias.