Modified tunneling field effect transistors and fabrication methods

A method comprising:

• fabricating a tunneling field effect transistor, the fabricating comprising:
• obtaining a gate disposed over a substrate structure;
• providing a source region, the source region being one of an n-type and a p-type, and a drain region, the drain region being the other of an n-type and a p-type, within the substrate structure separated by a channel region, the channel underlying, at least partially, the gate, wherein each of the source region, drain region and channel region have a region bandgap defined by a region valence band and a region conduction band;
• overlapping the source region with the gate to form a source region junction;
• overlapping the drain region with the gate to form a drain region junction;
• modifying the source region to attain a narrowed source region bandgap that is at least 60meV narrower than the channel region bandgap;
• and
• modifying the drain region to attain a narrowed drain region bandgap that is at least 60meV narrower than the channel region bandgap, the narrowed source region bandgap and the narrowed drain region bandgap facilitating quantum tunneling of charge carriers between at least one of the region valence bands and at least one of the region conduction bands such that the charge carriers conduct from the source region or the drain region to the channel region;
• applying a biased gate voltage to the gate such that, within the source region junction, the region valence and conduction bands are bent to enhance quantum tunneling of one of a hole type charge carrier and an electron type charge carrier;
• and
• applying an oppositely biased gate voltage to the gate such that, within the drain region junction, the region valence and conduction bands are bent to enhance quantum tunneling of the other of a hole type charge carrier and an electron type charge carrier.