Leakage current-based delay circuit
AssigneesSamsung Electronics Co., Ltd., Poshtech Academy-Industry Foundation
InventorsJaesup Lee, Tae-Young Chung, Bum-Man Kim, Dae-Chul Jeong
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AssigneesSamsung Electronics Co., Ltd., Poshtech Academy-Industry Foundation
InventorsJaesup Lee, Tae-Young Chung, Bum-Man Kim, Dae-Chul Jeong
Estimating the term…
A leakage current-based delay circuit is provided, wherein the delay circuit may include a first transistor circuit and a second transistor circuit, each transistor circuit may include a p-type transistor, an n-type transistor, an n-node between a drain node of the p-type transistor and a gate node of the n-type transistor, and a p-node between a gate node of the p-type transistor and a drain node of the n-type transistor. The p-node of the second transistor circuit may be charged based on a power source voltage through the first transistor circuit during a first time interval of an input signal, and the n-node of the second transistor circuit may be discharged based on a ground voltage through the first transistor circuit during the first time interval.
A delay circuit, comprising:
An electronic device comprising:
A delay circuit operation method, comprising:
An electronic device, comprising:
Dependencies are inferred from the claim text.