Non-volatile memory for high rewrite cycles application
AssigneeeMemory Technology Inc.
InventorsWen-Hao Ching, Yen-Hsin Lai, Shih-Chen Wang
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Abstract
A non-volatile memory has an array of non-volatile memory cells. Each of the non-volatile memory cells includes a coupling device formed on a first well, a read device, a floating gate device formed on a second well and coupled to the coupling device, a program device formed on the second well, and an erase device formed on a third well and coupled to the first floating gate device. The read device, the program device, and the erase device are formed on separate wells so as to separate the cycling counts of a read operation, a program operation and an erase operation of the non-volatile memory cell.
Claims12
A non-volatile memory cell comprising:
- a coupling device connected to a source line formed on a first well;
- a read device electrically directly connected to the coupling device and a first bit line;
- a floating gate device formed on a second well;
- a program device electrically connected to the floating gate device and a second bit line and formed on the second well;
- and
- an erase device formed on a third well;
- wherein the coupling device, the floating gate device and the erase device are coupled by a common floating gate;
- wherein a current sensing path may be built between the first bit line and the source line during a read operation;
- and
- wherein an area of a gate of the coupling device is larger than an area of a gate of the floating gate device.
Dependencies are inferred from the claim text.