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US 9,653,433 B2Granted
Multi-chip structure and method of forming same
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsChen-Hua Yu, Der-Chyang Yeh
Life of this patent
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Abstract
A device comprises a first chip and a second chip stacked together to form a multi-chip structure, wherein the multi-chip structure is embedded in an encapsulation layer, and wherein at least one edge of the first chip and the second chip is exposed outside the encapsulation layer, a redistribution layer on a surface of a first side of the encapsulation layer and a plurality of conductive bumps over the redistribution layer and connected to the redistribution layer.
Claims20
A device comprising:
- a fan-out structure comprising a redistribution layer on a first side of the fan-out structure and a dielectric layer over the redistribution layer;
- a first chip over the first side of the fan-out structure, wherein the first chip comprise a plurality of first through vias connected to the redistribution layer;
- a second chip over the first chip, wherein the second chip is connected to the first chip;
- and
- a molding compound layer disposed over the first side of the fan-out structure, wherein the first chip and the second chip are embedded in the molding compound layer, and wherein at least one edge of the first chip and the second chip is vertically aligned with an edge of the molding compound layer.
2 more elements
A device comprising:
- a first chip and a second chip stacked together to form a multi-chip structure, wherein the multi-chip structure is embedded in an encapsulation layer, and wherein at least one edge of the first chip and the second chip is exposed outside the encapsulation layer;
- a redistribution layer on a surface of a first side of the encapsulation layer;
- and
- a plurality of conductive bumps over the redistribution layer and connected to the redistribution layer.
1 more element
A method comprising:
- attaching a first chip comprising a plurality of stacked semiconductor dies on a carrier through an adhesive layer;
- mounting a second chip on the first chip;
- forming a molding compound layer over the carrier, wherein the first chip and the second chip are embedded in the molding compound layer, and wherein at least one edge of the first chip and the second chip is vertically aligned with an edge of the molding compound layer;
- grinding the molding compound layer until a surface of the second chip is exposed;
- forming a redistribution layer on the surface of the second chip;
- and
- forming a plurality of conductive bumps over the redistribution layer.
4 more elements
Dependencies are inferred from the claim text.