# US 9,646,874 B1 · Thermally-isolated silicon-based integrated circuits and related methods > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 9,646,874 B1 - Document ID: US9646874B1 - Status: Granted - Kind: B1 - Application number: 13/959,136 - Filed: 2013-08-05 - Granted: 2017-05-09 - Earliest claimed: 2013-08-05 - Assignees: Sandia Corporation - Applicants: Sandia Corporation - Inventors: Kenneth Wojciechowski; Roy H. Olsson; Peggy J. Clews; Todd Bauer - Web page: https://patentgrep.com/patent/US9646874B1 ## CPC - H10D 84/038: {using silicon technology, e.g. SiGe} - B81B 7/0083: {Temperature control} - H03H 3/02: for the manufacture of piezoelectric or electrostrictive resonators or networks (H03H3/08 takes precedence) - H10D 62/115: {Dielectric isolations, e.g. air gaps} - H10D 84/0151: {Manufacturing their isolation regions} - H10D 86/00: Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates - H10D 86/01: Manufacture or treatment - H10P 14/3411: {Silicon, silicon germanium or germanium} - H10P 14/3454: {Amorphous} - H10P 14/69391: {the material containing aluminium, e.g. Al2O3} - H10P 50/00: Etching of wafers, substrates or parts of devices - H10P 50/283: {by chemical means} - H10P 50/642: {Chemical etching} - H10W 10/011: {of isolation regions comprising dielectric materials} - H10W 10/021: {of air gaps} - H10W 10/10: Isolation regions comprising dielectric materials - H10W 10/20: Air gaps - H10W 40/00: Arrangements for thermal protection or thermal control (integrated devices comprising arrangements for thermal protection H10D89/60) - B81B 2203/0118: Cantilevers - H03H 2009/02181: {by application of heat from a heat source} - H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES - B81B: MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES (piezoelectric, electrostrictive or magnetostrictive elements per se H10N30/00, H10N35/00) - H03H: IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS (waveguides, resonators, lines or other devices of the waveguide type H01P) - H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10 - H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10 ## Abstract Thermally isolated devices may be formed by performing a series of etches on a silicon-based substrate. As a result of the series of etches, silicon material may be removed from underneath a region of an integrated circuit (IC). The removal of the silicon material from underneath the IC forms a gap between remaining substrate and the integrated circuit, though the integrated circuit remains connected to the substrate via a support bar arrangement that suspends the integrated circuit over the substrate. The creation of this gap functions to release the device from the substrate and create a thermally-isolated integrated circuit. ## Claims ### Claim 1 A thermally-isolated integrated circuit assembly formed on a silicon-based substrate having a back face that is free of etched openings, comprising: a piezoelectric resonator; a body of dielectric material; a support bar; a CMOS integrated circuit; a base layer of silicon; a base layer of silicon oxide above and contiguous to the silicon base layer; and an active silicon layer above and contiguous to the silicon oxide base layer; wherein: the CMOS integrated circuit comprises at least one device defined in the active silicon layer and further comprises a plurality of metallization layers that overlie the active silicon layer and are embedded in an interlayer dielectric; a lower cavity is defined within the silicon base layer; the body of dielectric material is suspended over the lower cavity by the support bar; the CMOS integrated circuit is encased on top, bottom, and all sides by the body of dielectric material; an upper cavity is defined in the top of the body of dielectric material; the piezoelectric resonator is suspended over the upper cavity and electrically connected to the CMOS integrated circuit through vertical electrical conductors extending within the body of dielectric material; the upper and lower cavities are interconnected by trenches in the body of dielectric material; and the support bar is formed in the silicon-based substrate to provide physical contact between the silicon-based substrate and the body of dielectric material. ### Claim 2 (depends on 1) The thermally-isolated integrated circuit assembly as in claim 1, wherein the CMOS integrated circuit comprises at least one component selected from the group consisting of diodes, capacitors, transistors, resistors and inductors. ### Claim 3 (depends on 1) The thermally-isolated integrated circuit assembly of claim 1, wherein the piezoelectric resonator is directly contacted from above and below by respective electrode layers of electrically conductive material. ### Claim 4 (depends on 1) The thermally-isolated integrated circuit assembly as in claim 1, further comprising a resistive heating element positioned so as to have a thermal path to the CMOS integrated circuit. ### Claim 5 (depends on 4) The thermally-isolated integrated circuit assembly as in claim 4, further comprising a temperature sensor positioned within the circuit assembly so as to have a thermal path to the CMOS integrated circuit. ### Claim 6 (depends on 1) The thermally-isolated integrated circuit assembly as in claim 1, wherein the silicon base layer, the silicon oxide base layer, and the active silicon layer are layers of an SOI wafer. ### Claim 7 (depends on 1) The thermally-isolated integrated circuit assembly of claim 1, wherein the support bar is U-shaped. ### Claim 8 (depends on 4) The thermally-isolated integrated circuit assembly of claim 4, wherein the resistive heating element is situated on the support bar. ### Claim 9 (depends on 5) The thermally-isolated integrated circuit assembly of claim 5, wherein the temperature sensor is situated on the support bar.