Video processor and activation method of video processor
AssigneeOlympus Corporation
InventorsMasaru Sudo, Kentaro Hase, Masahito Yokouchi, Hitoshi Komine, Hidetaro Kono
Life of this patent
Estimating the term…
Abstract
A video processor includes: a judgement section configured to judge whether an input is a 2D or 3D image signal; an LR synthesis section configured to embed left and right image signals into an image signal in a side-by-side format to output the signal if the input is the 3D image signal and configured to embed a 2D image signal into a position corresponding to one of the left and right in an image signal in a side-by-side format to output the signal if the input is the 2D image signal; and an image processing section configured to apply image processing to the image signal in the side-by-side format.
Claims6
A video processor comprising:
- a judgement section configured to judge whether an inputted image signal is a 3D image signal including a left image signal and a right image signal or a 2D image signal;
- an image signal synthesis section configured to embed the left image signal and the right image signal into an image signal in a side-by-side format to output the signal if the judgement section judges that the inputted image signal is the 3D image signal and configured to embed the 2D image signal into a position corresponding to one of a left image and a right image in an image signal in a side-by-side format to output the signal if the judgement section judges that the inputted image signal is the 2D image signal;
- and
- an image processing section configured to apply image processing to the image signal in the side-by-side format outputted by the image signal synthesis section.
An activation method of a video processor, the method comprising:
- by a judgement section, judging whether an inputted image signal is a 3D image signal including a left image signal and a right image signal or a 2D image signal;
- by an image signal synthesis section, embedding the left image signal and the right image signal into an image signal in a side-by-side format to output the signal if the judgement section judges that the inputted image signal is the 3D image signal and embedding the 2D image signal into a position corresponding to one of a left image and a right image in an image signal in a side-by-side format to output the signal if the judgement section judges that the inputted image signal is the 2D image signal;
- and
- by an image processing section, applying image processing to the image signal in the side-by-side format outputted by the image signal synthesis section.
Dependencies are inferred from the claim text.