US 9,606,913 B2Granted

Electronic circuit for and method of executing an application program stored in a one-time-programmable (OTP) memory in a system on chip (SoC)

AssigneeDialog Semiconductor GmbH

InventorsNikolaos Moschopoulos, Jakobus Johannes Verhallen, Konstantinos Ninos, Tobias Mueller, Dimitrios Papadopoulos

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Abstract

A method and apparatus for executing an application program stored in an one-time-programmable, OTP, memory in a system on chip (SoC) is described. The SoC has RAM, a CPU and an OTP controller. The OTP memory stores an application program. The method includes, by the processor unit at power-up, instructing the OTP controller to copy the application program from the OTP memory to RAM, executing the application program from RAM, and setting the system on chip (SoC) in sleep mode. By the OTP controller after a wake-up, copying the application program from the OTP memory to the RAM and after the copying, waking up the CPU and transferring control back to the CPU. By the CPU after being woken up by the OTP controller, executing the application program from RAM.

Claims14

Dependent claims

A system on chip (SoC) comprising a one-time-programmable, (OTP) memory, a read only memory (ROM), a random access memory, (RAM), a processor unit and an OTP controller, said processor unit being connected to said OTP controller, to said ROM, and to said RAM said OTP controller being connected to said OTP memory and to said RAM, said ROM comprising instructions to be used by said processor unit after a power-up of said system on chip (SoC), and said OTP memory storing a set of instructions relating to an application program and an application length indicating a length of said application program, the system on chip (SoC) being arranged such that:

said processor unit is configured to perform the following actions at power-up:
copy said application length from said OTP memory to a length register in said OTP controller, the length register being a retention register which keeps its memory content even in case the processor unit enters a sleep mode;
instruct said OTP controller to copy said set of instructions relating to said application program from said OTP memory to said RAM using said application length;
execute said set of instructions relating to said application program from said RAM;
set said system on chip (SoC) in sleep mode;
said OTP controller is configured to perform the following actions in response to receiving an interrupt to wake-up the system on chip (SoC) from said sleep mode:
copy said set of instructions relating to said application program from said OTP memory to said RAM while using said application length as stored in said length register;
in response to said copying of said set of instructions, wake up said processor unit and transfer control back to said processor unit;
said processor unit in response to being woken up by said OTP controller:
execute said set of instructions relating to said application program from said RAM.

7 more elements

A method of executing an application program stored in a one-time-programmable (OTP) memory in a system on chip (SoC), which system on chip (SoC) also comprises a read only memory (ROM), a random access memory (RAM), a processor unit and an OTP controller, said processor unit being connected to said OTP controller, to said ROM, and to said RAM, said OTP controller being connected to said OTP memory and to said RAM, said ROM comprising instructions to be used by said processor unit after a power-up of said system on chip (SoC), and said OTP memory storing a set of instructions relating to an application program and an application length indicating a length of said application program, the method comprising:

by said processor unit at power-up:
copying said application length from said OTP memory to a length register in said OTP controller, the length register being a retention register which keeps its memory content even in case the processor unit enters a sleep mode;
instructing said OTP controller to copy said set of instructions relating to said application program from said OTP memory to said RAM while using said application length;
executing said set of instructions relating to said application program from said RAM;
setting said system on chip (SoC) in sleep mode;
by said OTP controller in response to receiving an interrupt to wake-up the system on chip (SoC) from said sleep mode:
copying said set of instructions relating to said application program from said OTP memory to said RAM using said application length as stored in said length register;
in response to said copying of said set of instructions, waking up said processor unit and transferring control back to said processor unit;
by said processor unit in response to being woken up by said OTP controller:
executing said set of instructions relating to said application program from said RAM.

7 more elements

Dependencies are inferred from the claim text.

Facts

Application: 14/228,715Filed 28 Mar 2014
Priority: EP 1316163928 Mar 2013
Published: US 2014/0297928 A12 Oct 2014
Granted: 28 Mar 2017
Term ends: Not estimatedThe source records don’t support an estimate.

Classification8 codes

G06F 12/0246
Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory: in block erasable memory, e.g. flash memory
G06F 9/4403
Bootstrapping: processor initialisation
G06F 9/4418
Bootstrapping: suspend and resume; Hibernate and awake
G06F 1/24
Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00: resetting means