Method and apparatus for asynchronous processor based on clock delay adjustment
AssigneeHuawei Technologies Co., Ltd.
InventorsWen Tong, Yiqun Ge, Qifan Zhang, Wuxian Shi, Tao Huang
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Abstract
A clock-less asynchronous processing circuit or system utilizes a self-clocked generator to adjust the processing delay (latency) needed/allowed to the processing cycle in the circuit/system. The timing of the self-clocked generator is dynamically adjustable depending on various parameters. These parameters may include processing instruction, opcode information, type of processing to be performed by the circuit/system, or overall desired processing performance. The latency may also be adjusted to change processing performance, including power consumption, speed etc.
Claims14
An asynchronous processing system, comprising:
- an asynchronous logic circuit configured to perform at least one processing function on input data;
- a controller configured to:
- identify from the at least one processing function, a type of processing to be performed by the asynchronous logic circuitry pursuant to the at least one processing function;
- determine from the identified type of processing, a processing delay period of time;
- and
- provide the processing delay period of time to a self-clocked generator coupled to the asynchronous logic circuit;
- the self-clocked generator configured to receive a trigger signal and output a self-clocking signal the processing delay period of time after receiving the trigger signal, wherein the processing delay period of time is configurable;
- and
- a data storage element configured to store processed data from the asynchronous logic circuit in response to the self-clocking signal.
A method for operating an asynchronous processing system comprising asynchronous logic circuitry, the method comprising:
- receiving a first processing instruction;
- identifying from the first processing instruction a first type of processing to be performed by the asynchronous logic circuitry pursuant to the first processing instruction;
- determining from the identified first type of processing, a first processing delay period of time;
- and
- configuring a self-clock generator coupled to the asynchronous logic circuitry to output a self-clocking signal after receiving a trigger signal in accordance with the determined first processing delay period of time.
Dependencies are inferred from the claim text.