Reconfigurable wideband sub-ranging analog-to-digital converter

A reconfigurable analog-to-digital converter (ADC) system comprising:

• a first converter stage including:
• a first sample and hold circuit for sampling an input signal;
• a first ADC configured to generate a digital representation of the sampled input signal from the first sample and hold circuit, the first ADC;
• and
• a first digital-to-analog converter (DAC) responsive to the output of the first ADC and configured to generate an analog representation of the digital representation of the sampled input signal, the first DAC comprising:
• a plurality of resistive elements, each resistive element arranged in parallel with each other resistive element, the plurality of resistive elements defining a resistive load;
• and
• at least one switching element arranged in series with at least one of the resistive elements for selectively altering a resistance of resistive load in response to the control signal;
• a control processor configured to generate a digital control signal;
• and
• a current control circuit responsive to the digital control signal for generating an analog current control signal for selectively altering a characteristic of at least one of the first ADC and the first DAC.