Solid-state imaging apparatus and imaging device

A solid-state imaging apparatus comprising:

• an imaging section in which a plurality of pixels, each of which has a photoelectric conversion element, are disposed in a matrix;
• a clock generation section configured to generate a plurality of phase signals including different phases from each other;
• a reference signal generation section configured to generate a reference signal whose amplitude increases or decreases with the passage of time;
• a comparison section disposed corresponding to a column in an array of the plurality of pixels and configured to start a comparison process on a pixel signal output from the pixel and the reference signal at a first timing and end the comparison process at a second timing at which the reference signal has satisfied a predetermined condition with respect to the pixel signal;
• a latch section disposed corresponding to the comparison section and configured to latch logic states of the plurality of phase signals;
• and
• a latch control section disposed corresponding to the comparison section and configured to enable the latch section at the second timing and cause the latch section to execute a latch operation at a third timing at which a time based on a current output from the comparison section has elapsed from the second timing,
• wherein the comparison section includes
• a differential amplifier including a first transistor with a gate to which the reference signal is input and a second transistor with a gate to which the pixel signal is input and configured to output a first comparison signal determined according to a result of comparing the reference signal to the pixel signal when the comparison process is executed,
• a current output element configured to output substantially a constant current when the comparison process is executed, and
• a third transistor,
• wherein the third transistor includes a gate to which the first comparison signal is input,
• before the second timing at which a state of the first comparison signal changes, a current output from the current output element flows between a drain and a source, and
• after the second timing, the third transistor becomes an OFF state, and
• wherein the comparison section outputs a second comparison signal based on the current output from the current output element after the second timing.