# US 9,564,606 B2 · Assembly of vertically aligned nanotube arrays containing particles and application thereof

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- Number: US 9,564,606 B2
- Document ID: US9564606B2
- Status: Granted
- Kind: B2
- Application number: 14/978,962
- Filed: 2015-12-22
- Published: 2016-05-05
- Granted: 2017-02-07
- Earliest claimed: 2014-07-31
- Assignees: Huawei Technologies Co., Ltd.
- Applicants: Huawei Technologies Co., Ltd.
- Inventors: David Tomanek; Wei Han
- Web page: https://patentgrep.com/patent/US9564606B2

## CPC

- G11C 13/025: {using fullerenes, e.g. C60, or nanotubes, e.g. carbon or silicon nanotubes}
- H10K 10/50: Bistable switching devices
- H10K 71/621: {Providing a shape to conductive layers, e.g. patterning or selective deposition}
- H10K 85/221: {Carbon nanotubes}
- B82Y 10/00: Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
- B82Y 40/00: Manufacture or treatment of nanostructures
- G11C 2213/16: Memory cell being a nanotube, e.g. suspended nanotube
- Y10S 977/743: having specified tube end structure, e.g. close-ended shell or open-ended tube
- Y10S 977/848: Tube end modifications, e.g. capping, joining, splicing
- Y10S 977/943: Information storage or retrieval using nanostructure
- G11C: STATIC STORES (semiconductor memory devices H10B)
- H10K: ORGANIC ELECTRIC SOLID-STATE DEVICES
- B82Y: SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
- Y10S: TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS

## Abstract

A nanotube assembly including a nanotube layer, a first layer and a second layer. The nanotube layer comprises a vertically aligned nanotube array. The nanotube array includes a plurality of nanotubes. The first layer of a first conductive material is disposed on one surface of the nanotube layer. The second layer of a second conductive material is disposed on an opposite surface of the nanotube layer. The nanotube of the nanotube layer includes a first end against the first layer and a second end against the second layer. The resistance from the first end to the first layer is lower than a resistance from the second end to the second layer. One or more nano-particles are placed within the nanotube. At least one of the nano-particles is electrically charged, and can move along the nanotube under influence of an electric field.

## Claims

### Claim 1

A nanotube assembly, comprising:
a nanotube layer comprising a vertically aligned nanotube array, wherein the nanotube array comprises a plurality of nanotubes;
a first layer of a first conductive material disposed on one surface of the nanotube layer; and
a second layer of a second conductive material disposed on an opposite surface of the nanotube layer,
wherein a nanotube of the nanotube layer comprises a first end against the first layer and a second end against the second layer,
wherein a resistance from the first end to the first layer is lower than a resistance from the second end to the second layer,
wherein one or more nano-particles are placed within the nanotube,
wherein at least one of the nano-particles is electrically charged, and
wherein the at least one of the nano-particles is capable of moving along the nanotube under influence of an electric field.

### Claim 2 (depends on 1)

The nanotube assembly of claim 1, wherein the second end is degraded.

### Claim 3 (depends on 2)

The nanotube assembly of claim 2, wherein the second end is trimmed.

### Claim 4 (depends on 2)

The nanotube assembly of claim 2, wherein the second end has defects in an atomic scale.

### Claim 5 (depends on 2)

The nanotube assembly of claim 2, wherein the second end is siliconized.

### Claim 6 (depends on 1)

The nanotube assembly of claim 1, wherein the first conductive material comprises a plurality of catalyst particles.

### Claim 7 (depends on 1)

The nanotube assembly of claim 1, wherein the nanotubes are divided into a plurality of sub-arrays, wherein each of the sub-array comprises a group of the nanotubes, wherein a pattern of the first layer and a pattern of the second layer overlap at a plurality of units, and wherein each sub-array is on one of the units.

### Claim 8 (depends on 1)

The nanotube assembly of claim 1, wherein patterns of the first and second layers comprise a plurality of non-intersecting lines, and wherein a width of each of the non-intersecting lines exceeds a diameter of a nanotube of the array.

### Claim 9 (depends on 1)

The nanotube assembly of claim 1 is compatible with complementary metal oxide semiconductor (CMOS) process.

### Claim 10 (depends on 1)

The nanotube assembly of claim 1, wherein the nano-particles are fullerene molecules.

### Claim 11 (depends on 1)

The nanotube assembly of claim 1, wherein the nano-particles are metallfullerene molecules.

### Claim 12

A process for manufacturing a nanotube assembly, comprising:
forming a first layer of a first conductive material;
forming a nanotube layer of vertically aligned nanotube array on the first layer, wherein the vertically aligned nanotube array comprises a plurality of nanotubes, and wherein a nanotube of the nanotube layer comprises a first end against the first layer and a second end;
introducing one or more nano-particles within the nanotube, wherein at least one of the nano-particles is charged, and wherein the at least one of the nano-particles is capable of moving along the nanotube under influence of an electric field; and
forming a second layer of a second conductive material on the nanotube layer, wherein the second end is against the second layer, wherein a resistance from the first end to the first layer is controlled to be substantially different from a resistance from the second end to the second layer.

### Claim 13 (depends on 12)

The process of claim 12, further comprising degrading one end of the first end and the second end to increase a resistance from the end to a layer the end is against of the first layer and the second layer.

### Claim 14 (depends on 13)

The process of claim 13, wherein degrading one end of the first end and the second end comprises trimming the end.

### Claim 15 (depends on 13)

The process of claim 13, wherein degrading one end of the first end and the second end comprises creating defects in an atomic scale at the end.

### Claim 16 (depends on 13)

The process of claim 13, wherein degrading one end of the first end and the second end comprises siliconizing the end.

### Claim 17 (depends on 12)

The process of claim 12, wherein the first conductive material comprises a plurality of catalyst particles.

### Claim 18 (depends on 12)

The process of claim 12, wherein a pattern of the first layer and a pattern of the second layer overlap at a plurality of units, and wherein the process further comprises:
dividing the nanotubes into a plurality of sub-arrays, wherein each of the sub-array comprises a group of the nanotubes; and
forming each of the sub-array on one of the units.

### Claim 19 (depends on 12)

The process of claim 12, wherein forming a first layer and forming a second layer comprise forming a first pattern of the first layer and a second pattern of the second layer, wherein the first and second pattern comprise a plurality of non-intersecting lines, and wherein a width of each of the non-intersecting lines exceeds a diameter of a nanotube of the array.

### Claim 20 (depends on 12)

The process of claim 12 is compatible with complementary metal oxide semiconductor (CMOS) process.

### Claim 21 (depends on 12)

The process of claim 12, wherein the nano-particles are fullerene molecules.

### Claim 22 (depends on 12)

The process of claim 12, wherein the nano-particles are metallfullerene molecules.