Systems and methods for rapid processing and storage of data
AssigneeCalifornia Institute of Technology
InventorMark A. Stalzer
Life of this patent
Estimating the term…
Abstract
Systems and methods of building massively parallel computing systems using low power computing complexes in accordance with embodiments of the invention are disclosed. A massively parallel computing system in accordance with one embodiment of the invention includes at least one Solid State Blade configured to communicate via a high performance network fabric. In addition, each Solid State Blade includes a processor configured to communicate with a plurality of low power computing complexes interconnected by a router, and each low power computing complex includes at least one general processing core, an accelerator, an I/O interface, and cache memory and is configured to communicate with non-volatile solid state memory.
Claims17
A server, comprising:
- a plurality of computing complexes;
- a processor configured to communicate with the plurality of computing complexes interconnected by an on-server router;
- wherein each computing complex comprises:
- a system on chip including:
- at least one general processing core and an associated cache memory,
- an accelerator, and
- a RAID memory controller,
- wherein the system on chip is packaged with Package on Package memory;
- and
- a non-volatile memory component configured in a RAID configuration that is separate from and connected to the system on chip;
- wherein a general processing core in a given computing complex is configured to use the RAID memory controller to directly read and write data to the non-volatile memory component within the given computing complex, which cannot be directly written to and read from by general processing cores within other computing complexes in the plurality of computing complexes;
- wherein general processing cores in the plurality of computing complexes are configured to directly read from and write data to the non-volatile memory component to which they are connected in parallel;
- wherein the on-server router is configured to connect the computing complexes using individual interconnects;
- wherein the on-server router includes an interconnect to the processor and an interconnect to at least one port to a high performance network fabric for off-blade communications;
- wherein the processor is configured to broadcast lookup requests with respect to data stored within the plurality of computing complexes to the general purpose processing cores within the plurality of computing complexes via the on-server router;
- wherein the general processing cores are configured to search in parallel for data requested by the lookup requests using an index that has been distributed to each computing complex and stored in the Package on Package memory of each computing complex;
- and
- wherein the server is configured to communicate with external devices via the high performance network fabric.
A massively parallel computing system, comprising:
- at least one Solid State Server configured to communicate with at least one other Solid State Server via a high performance network fabric;
- wherein each Solid State Server comprises a plurality of computing complexes interconnected by an on-server router and a processor configured to communicate with the plurality of computing complexes via the on-server router;
- wherein each computing complex comprises:
- a system on chip including:
- at least one general processing core and an associated cache memory,
- an accelerator, and
- a RAID memory controller,
- wherein the system on chip is packaged with Package on Package memory;
- and
- a non-volatile memory component configured in a RAID configuration that is separate from and connected to the system on chip;
- wherein a general processing core in a given computing complex is configured to use the RAID memory controller to directly read and write data to the non-volatile memory component within the given computing complex, which cannot be directly written to and read from by general processing cores within other computing complexes in the plurality of computing complexes;
- wherein general processing cores in the plurality of computing complexes are configured to directly read from and write data to the non-volatile memory component to which they are connected in parallel;
- wherein the on-server router is configured to connect the computing complexes using individual interconnects;
- and
- wherein the on-server router includes an interconnect to the processor and an interconnect to at least one port to the high performance network fabric for off-blade communications;
- and
- wherein the processor is configured to broadcast lookup requests with respect to data stored within the plurality of computing complexes to the general purpose processing cores within the plurality of computing complexes via the on-server router;
- and
- wherein the general processing cores are configured to search in parallel for data requested by the lookup requests using an index that has been distributed to each computing complex and stored in the Package on Package memory of each computing complex.
A massively parallel computing system, comprising:
- a plurality of servers interconnected via a high performance network fabric, where at least one of the servers is a Solid State Server;
- wherein each Solid State Server comprises a plurality of computing complexes interconnected by an on-server router and a processor configured to communicate with the plurality of computing complexes via the on-server router;
- wherein each computing complex comprises:
- a system on chip including:
- at least one general processing core and an associated cache memory,
- an accelerator, and
- a RAID memory controller,
- wherein the system on chip is packaged with Package on Package memory;
- and
- a non-volatile memory component configured in a RAID configuration that is separate from and connected to the system on chip;
- wherein a general processing core in a given computing complex is configured to use the RAID memory controller to directly read and write to the non-volatile memory component within the given computing complex, which cannot be directly written to and read from by general processing cores within other computing complexes in the plurality of computing complexes;
- wherein general processing cores in the plurality of computing complexes are configured to directly read from and write data to the non-volatile memory component to which they are connected in parallel;
- wherein the on-server router is configured to connect the computing complexes using individual interconnects;
- wherein the on-server router includes an interconnect to the processor and an interconnect to at least one port to the high performance network fabric for off-blade communications;
- and
- wherein the processor is configured to broadcast lookup requests with respect to data stored within the plurality of computing complexes to the general purpose processing cores within the plurality of computing complexes via the on-server router;
- and
- wherein the general processing cores are configured to search in parallel for data requested by the lookup requests using an index that has been distributed to each computing complex and stored in the Package on Package memory of each computing complex.
Dependencies are inferred from the claim text.