System and method for adaptive power management
AssigneeMaxim Intergrated Products, Inc.
InventorsEdward Tangkwai Ma, Nancy Kow Lida, Sung Ung Kwak, Khankap Mounarath, Robert Michael Muchsel, Hung Thanh Nguyen, Gary Zanders
Life of this patent
Estimating the term…
Abstract
Various embodiments of the invention allow to effectively reduce device and system power consumption in both active and inactive modes without compromising performance, without large area overhead, and at low cost. In certain embodiments, the reduction of power consumption is accomplished by combining circuit control techniques with power gating methods to reduce power loss due to leakage current.
Claims19
A method for managing power in an electronic system, the method comprising:
- applying first and second control signals to a hazard-free logic component to synchronize a plurality of functional blocks that comprise data independent synchronous data processing circuits, the hazard-free logic component being use to at least partially control a transition from a purely asynchronous mode of operation to a partially synchronous mode of operation;
- applying the first control signal and a handshake signal to a power gating circuit that supplies power to at least one of the independent synchronous data processing circuits;
- performing a data processing step on data in response to energizing the at least one synchronous data processing circuit;
- outputting the handshake signal to acknowledge completion of logical operations;
- applying the first and handshake signals to the power gating circuit to de-energize the at least one synchronous data processing circuit;
- and
- outputting the processed data.
A data processing system comprising:
- a first stage comprising a synchronous circuit, the synchronous circuit is configured to perform a data processing step on data and output processed data;
- a first hazard-free logic component coupled within the first stage, the hazard-free logic component receives first and second handshake signals and at least partially controls a transition from a purely asynchronous mode of operation to a partially synchronous mode of operation;
- second and third stages coupled to the first stage, a second hazard-free logic component in the second stage generates the first handshake signal, and a third hazard-free logic component in the third stage generates the second control signal;
- a power gating element coupled to the circuit, the power gating element supplies power to the circuit in response to the first and second handshake signals;
- and
- an output storage element coupled to the circuit, the output storage element comprises circuitry to store and output the processed data.
Dependencies are inferred from the claim text.