Method and device for discharging an inverter capacitor

A drive system for an n-phase electric machine, where n ≧1, the drive system comprising:

• an intermediate-circuit capacitor which is connected to two input voltage terminals;
• an inverter having a plurality of semiconductor switches, the inverter is coupled with the intermediate-circuit capacitor and supplied with electric energy from the intermediate-circuit capacitor, and the inverter is configured to generate an n-phase supply voltage for the n-phase electric machine;
• a control configured to generate switching signals for the plurality of semiconductor switches of the inverter;
• and
• a plurality of control devices coupled to the control, each control device of the plurality of control devices is configured to generate a first switching control signal and a second switching control signal for one of the plurality of semiconductor switches of the inverter, wherein the each control device of the plurality of control devices includes
• a switching signal amplifier configured to amplify one of the switching signals generated by the control to generate the first switching control signal which drives the one of the plurality of semiconductor switches in a switching mode;
• a current regulator which is coupled with a current sensor output of the one of the plurality of semiconductor switches and configured to generate the second switching control signal which drives the one of the plurality of semiconductor switches in a linear mode;
• and
• a selector which is coupled with the switching signal amplifier and the current regulator and is configured to output either the first switching control signal or the second switching control signal as a function of at least one mode selection signal for driving a control terminal of the one of the plurality of semiconductor switches,
• wherein the linear mode is achieved by the control terminal of the one of the plurality of semiconductor switches being driven with an intermediate voltage value which lies between a first voltage value for switching on and a second voltage value for switching off the one of the plurality of semiconductor switches, or wherein the linear mode is achieved by the control terminal of the one of the plurality of semiconductor switches being raised for a predefined period to the first voltage value for switching on, and then being lowered again to the second voltage value for switching off the one of the plurality of semiconductor switches, before the one of the plurality of semiconductor switches has reached full conductivity.

A method for driving an inverter, the method comprising:

• amplifying a switching signal for each semiconductor switch of a plurality of semiconductor switches of the inverter to generate a plurality of first switching control signals, wherein one of the plurality of first switching controls signals is configured to drive a first semiconductor switch of the plurality of semiconductor switches in a switching mode;
• measuring an intensity of a current flowing through the each semiconductor switch of the plurality of semiconductor switches;
• generating a plurality of second switching control signals as a function of measuring the intensity of the current flowing through the semiconductor switches, wherein one of the plurality of second switching control signals is configured to drive the first semiconductor switch of the plurality of semiconductor switches in a linear mode;
• and
• selecting the one of the plurality of first switching control signals or the one of the plurality of second switching control signals for driving a control terminal of the first semiconductor switch as a function of at least one mode selection signal for the first semiconductor switch,
• wherein the linear mode is achieved by the control terminal of the first semiconductor switch being driven with an intermediate voltage value which lies between a first voltage value for switching on and a second voltage value for switching off the first semiconductor switch, or wherein the linear mode is achieved by the control terminal of the first semiconductor switch being raised for a predefined period to the first voltage value for switching on, and then being lowered again to the second voltage value for switching off the first semiconductor switch, before the first semiconductor switch has reached full conductivity.