Self aligned contact scheme

A method comprising:

• forming a first metal gate and a second metal gate over a substrate, the first metal gate and the second metal gate each having gate spacers on opposing sidewalls of the respective metal gates;
• forming a first dielectric layer over the substrate and adjacent the first and second metal gates;
• recessing the first metal gate and the second metal gate to have top surfaces below a top surface of a the first dielectric layer;
• forming a first hard mask layer on the recessed top surfaces of the first metal gate and the second metal gate;
• recessing the first hard mask layer to have top surfaces below the top surface of the first dielectric layer;
• forming a second hard mask layer on the recessed top surfaces of the first hard mask layer, the second hard mask layer having a different material composition than the first hard mask layer;
• and
• planarizing the second hard mask layer to have a top surface coplanar with the top surface of the first dielectric layer.

A structure comprising:

• a first gate stack on a substrate, the first gate stack comprising a first high-k gate dielectric layer and a first metal gate electrode;
• a first hard mask layer on the first gate stack;
• a first set of gate spacers on opposing sidewalls of the first gate stack and the first hard mask layer;
• a first etch stop layer on sidewalls of the first set of gate spacers;
• a first interlayer dielectric surrounding the first etch stop layer and the first gate stack, the first interlayer dielectric contacting at least a portion of the first etch stop layer;
• a first conductive contact extending through the first interlayer dielectric to contact a top surface of the substrate, the first conductive contact having sidewalls contacting sidewalls of the first etch stop layer;
• a second etch stop layer over and contacting top surfaces of the first etch stop layer, the first set of gate spacers, the first hard mask layer, and the first interlayer dielectric;
• a second interlayer dielectric over the second etch stop layer;
• and
• a second conductive contact extending through the second interlayer dielectric and the second etch stop layer to contact the first conductive contact.