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US 9,545,003 B2Granted
Connector footprints in printed circuit board (PCB)
AssigneesFCI Americas Technology, Inc., FCI Asia Pte. Ltd.
InventorsMadhumitha Rengarajan, Jan De Geest, Stephen B. Smith, Stefaan Hendrik Jozef Sercu
Life of this patent
Estimating the term…
Abstract
An electrical connector footprint on a printed circuit board (PCB) can include vias and antipads surrounding those vias. While conventional antipads surrounding vias are large in order to improve impedance of the PCB, the presence of the antipads can compromise the integrity of the ground plane and can permit cross talk to arise between differential pairs on different layers in the PCB. Antipads can be constructed and arranged so as to limit cross talk between layers in a PCB, while also maximizing impedance.
Claims25
A printed circuit board comprising:
- a first electrically conductive layer that includes a first electrically conductive region and a first antipad defined by the first electrically conductive region, the first antipad including a first dielectric region and a portion of a first electrically plated via that extends through the first dielectric region along a first direction, the first antipad having a first maximum area along a first plane that is normal to the first direction, wherein the first dielectric region is aligned with the first electrically conductive region along the first plane;
- a first dielectric layer disposed below the first electrically conductive layer along the first direction;
- a second electrically conductive layer disposed below the first dielectric layer along the first direction, the second electrically conductive layer including a second electrically conductive region and a second antipad defined by the second electrically conductive region, the second antipad having a second maximum area along a second plane that is normal to the first direction, the second maximum area less than the first maximum area;
- a third electrically conductive layer disposed below the second electrically conductive layer along the first direction such that no additional electrically conductive layer is disposed between the second electrically conductive layer and the third electrically conductive layer along the first direction, the third electrically conductive layer defining a third electrically conductive region and a third antipad, the third antipad having a third maximum area along a third plane that is normal to the first direction, the third maximum area substantially equal to the second maximum area;
- and
- an electrically conductive signal layer that includes one or more electrically conductive traces electrically coupled to the first electrically plated via, the electrically conductive signal layer being the only signal layer disposed between the first electrically conductive layer and the second electrically conductive layer along the first direction,
- wherein at least a portion of each of the second antipad and the third antipad is aligned with the portion of the first electrically plated via along the first direction.
4 more elements
A printed circuit board comprising:
- a first signal layer comprising a first differential pair of electrical signal traces that defines a first centerline oriented along a transverse direction, wherein the first centerline is centrally disposed between the electrical signal traces of the first differential signal pair with respect to a lateral direction;
- a second signal layer comprising a second differential pair of electrical signal traces spaced from the first differential pair along the transverse direction, the second differential pair defining a second centerline centrally oriented along the transverse direction, wherein the second centerline is disposed between the electrical signal traces of the second differential signal pair with respect to the lateral direction;
- and
- an electrically conductive layer disposed between the first differential signal pair and the second differential signal pair with respect to the transverse direction, wherein the first centerline and the second centerline are offset with respect to each other along the lateral direction to reduce electromagnetic interference between the first differential signal pair and the second differential signal pair,
- wherein the first differential pair of electrical signal traces defines the first centerline such that the first centerline is centrally disposed between no differential pairs of electrical signal traces of the second signal layer.
2 more elements
A printed circuit board comprising:
- a first differential pair of electrical signal traces that defines a first centerline centrally disposed between the electrical signal traces of the first differential signal pair;
- a second differential pair of electrical signal traces spaced from the first differential pair along a first direction, the second differential pair defining a second centerline centrally disposed between the electrical signal traces of the second differential signal pair;
- and
- an electrically conductive layer disposed between the first differential signal pair and the second differential signal pair along the first direction, the electrically conductive layer including an electrically conductive region and first and second antipads that are defined by the electrically conductive region, the first and second antipads spaced from each other along a second direction that is perpendicular to the first direction, wherein each of the first and second differential pairs is disposed between the first and second antipads with respect to the second direction;
- and
- at least one ground via spaced from each of the first and second antipads along a third direction that is substantially perpendicular to both the first and second directions,
- wherein the first centerline is disposed closer to the first antipad than the second antipad along the second direction, and the second centerline is disposed closer to the second antipad than the first antipad along the second direction.
4 more elements
Dependencies are inferred from the claim text.