PCB having offset differential signal routing

#Conventional printed circuit boards (PCBs) include electrically insulative layers and electrically conductive layers alternatingly arranged along the thickness of the printed circuit board. Certain ones of the electrically conductive layers are typically configured as signal layers, and certain others of the electrically conductive layers are typically configured as ground layers. The signal layers each can include electrical signal traces that are supported and surrounded by electrically insulative material, and the ground layers can include one or more electrically conductive regions that are supported and surrounded by electrically insulative material. Because the ground layers are disposed between adjacent signal layers, the ground layers provide shielding between the electrical signal traces of one signal layer and the electrical signal traces of the adjacent signal layer. Conventional printed circuit boards can include at least first and second linear arrays that each contain signal vias and ground vias. The ground vias extend through at least one of the signal layers and are placed in electrical communication with the electrically conductive region of a respective one of the at least one ground layer. The signal vias can be arranged in first and second differential signal pairs that are placed in electrical communication with respective first and second sets of electrical differential signal traces that route electrical signals along the printed circuit board. The first linear array includes the signal vias of the first differential signal pair, and the second linear array includes the signal vias of the second differential signal pair. Each of the first and second linear array can include a respective at least one ground via. The electrical signal traces are positioned between the first and second linear arrays, and are oriented parallel to the linear arrays. The electrical differential signal traces are positioned so as to be symmetrical about a center line that extends equidistantly between the first and second linear arrays. In certain implementations, conventional printed circuit boards further include first and second arrays of ground vias that are disposed between the respective first and second linear arrays and the electrical signal traces.

#In accordance with one embodiment, a printed circuit board can include at least one electrical signal trace elongate along a first direction. The printed circuit board can further include an electrically conductive ground layer disposed below the first electrical signal trace along a second direction that is perpendicular to the first direction, the electrically conductive ground layer extending along a plane that is normal to the second direction. The printed circuit board can further include a first linear array that includes at least one electrically conductive signal via and at least one electrically conductive ground via, the first linear array oriented along the first direction. The printed circuit board can further include a second linear array that includes at least one electrically conductive signal via and at least one electrically conductive ground via, the second linear array oriented along the first direction. The second linear array can be spaced from and consecutive with the first linear array along a third direction that is perpendicular with respect to each of the first and second directions. The at least one electrical signal trace can be disposed between the first and second linear arrays with respect to the third direction. The printed circuit board can further include at least one group of ground isolation vias that is oriented along the first direction, the at least one group of ground isolation vias disposed between the first electrical signal trace and the second linear array with respect to the second direction.

#The foregoing summary, as well as the following detailed description of an example embodiment of the application, will be better understood when read in conjunction with the appended drawings. For the purposes of illustrating the present disclosure, there is shown in the drawings an example embodiment. It should be understood, however, that the application is not limited to the precise arrangements and instrumentalities shown. In the drawings:

#FIG. 1 is a top view of a portion of a printed circuit board constructed in accordance with one embodiment;

#FIG. 2 is a sectional side elevation view of the portion of the printed circuit board illustrated in FIG. 1, taken along line along line 2-2; and

#The present disclosure may be understood more readily by reference to the following detailed description taken in connection with the accompanying figures and examples, which form a part of this disclosure. It is to be understood that this invention is not limited to the specific devices, methods, applications, conditions or parameters described and/or shown herein, and that the terminology used herein is for the purpose of describing particular embodiments by way of example only and is not intended to be limiting of the claimed invention. Also, as used in the specification including the appended claims, the singular forms “a,” “an,” and “the” include the plural, and reference to a particular numerical value includes at least that particular value, unless the context clearly dictates otherwise. The term “plurality”, as used herein, means more than one. When a range of values is expressed, another embodiment includes from the one particular value and/or to the other particular value. Similarly, when values are expressed as approximations, by use of the antecedent “about,” it will be understood that the particular value forms another embodiment. All ranges are inclusive and combinable.

#It is to be appreciated that certain features of the invention which are, for clarity, described herein in the context of separate embodiments, may also be provided in combination in a single embodiment. Conversely, various features of the invention that are, for brevity, described in the context of a single embodiment, may also be provided separately or in any sub combination. Further, reference to values stated in ranges include each and every value within that range. Unless otherwise noted, common reference numbers among the Figures should be understood to refer to similar features.

#Referring to FIGS. 1-2 generally, a printed circuit board (PCB) 100 can be configured as a daughter card or alternatively constructed circuit board that is configured to be placed in electrical communication with electrical contacts of a complementary electrical connector that is mounted to the electrical connector. For instance, the printed circuit board 100 can include a dielectric or electrically insulative material, such as glass-filled or glass impregnated epoxy, electrical signal mounting locations supported by the electrically insulative material, and electrical ground mounting locations supported by the electrically insulative material. The signal mounting locations are configured to be placed in electrical communication with mounting portions of electrical signal contacts of the complementary electrical connector, and the ground mounting locations are configured to be placed in electrical communication with mounting portions of electrical ground contacts of the complementary electrical connector. For instance, the signal mounting portions can be configured as signal vias S that define respective electrically plated holes, and the ground mounting portions can be configured as ground vias G that define respective electrically plated holes. The signal vias S are configured to receive press-fit tails of electrical signal contacts of the complementary electrical connector, and the ground vias G are configured to receive press-fit tails of electrical ground contacts of the complementary electrical connector. It should be appreciated that the signal mounting portions and ground mounting portions can alternatively be configured as contact pads that are configured to be placed in contact with the respective mounting portions of the signal contacts and ground contacts of the complementary electrical connector that are surface mounted to the contact pads. The signal mounting portions are in electrical communication with respective signal traces 108 that are configured to route electrical signals along the printed circuit board 100.