Method and apparatus for a non-deterministic random bit generator (NRBG)
AssigneeIntel Corporation
InventorsGeorge W. Cox, David Johnston, Martin G. Dixon, Stephen A. Fischer, Jason W. Brandt
Life of this patent
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Abstract
A hardware-based digital random number generator is provided. In one embodiment, a processor includes a digital random number generator (DRNG) to condition entropy data provided by an entropy source, to generate a plurality of deterministic random bit (DRB) strings, and to generate a plurality of nondeterministic random bit (NRB) strings, and an execution unit coupled to the DRNG, in response to a first instruction to read a seed value, to retrieve one of the NRB strings from the DRNG and to store the NRB string in a destination register specified by the first instruction.
Claims8
An apparatus, comprising:
- an interconnect;
- a digital random number generator (DRNG) circuit to condition entropy data provided by an entropy source, to generate and output a plurality of deterministic random bit (DRB) strings, and to generate and output a plurality of nondeterministic random bit (NRB) strings, wherein the plurality of DRB and NRB strings are distinct strings;
- an execution unit circuit coupled to the DRNG circuit, in response to a first instruction to read a seed value, to retrieve one of the NRB strings from the DRNG and to store the NRB string in a destination register specified by the first instruction, and in response to a second instruction to read a random number, to retrieve one of the DRB strings from the DRNG circuit and to store the DRB in a destination register specified by the second instruction;
- and
- a flag register to store a flag set by the execution unit to indicate whether the NRB string stored in the destination register is valid.
A system, comprising:
- an interconnect;
- a processor coupled the interconnect, the processor including
- a digital random number generator (DRNG) circuit to condition entropy data provided by an entropy source, to generate and output a plurality of deterministic random bit (DRB) strings, and to generate and output a plurality of nondeterministic random bit (NRB) strings, wherein the plurality of DRB and NRB strings are distinct strings,
- an execution unit circuit coupled to the DRNG circuit, in response to a first instruction to read a seed value, to retrieve one of the NRB strings from the DRNG circuit and to store the NRB string in a destination register specified by the first instruction, and in response to a second instruction to read a random number, to retrieve one of the DRB strings from the DRNG circuit and to store the DRB in a destination register specified by the second instruction, and
- a flag register to store a flag set by the execution unit to indicate whether the NRB string stored in the destination register is valid;
- and
- a dynamic random access memory (DRAM) coupled to the interconnect.
Dependencies are inferred from the claim text.