Margin test methods and circuits

A receiver comprising:

• a data-input terminal to receive a data signal;
• first and second data samplers coupled to the data-input terminal to sample the data signal with respect to respective first and second references on edges of a data clock signal to produce respective first and second streams of data samples on respective first and second data output terminals;
• a third data sampler coupled to the data-input terminal to sample the data signal with respect to a third reference on edges of a test clock signal to produce a third stream of data samples on a respective third data output terminal;
• comparison circuitry coupled to the first, second, and third data output terminals to compare the first and second streams of data samples with the third stream of data samples;
• and
• error-capturing logic coupled to the comparison circuitry to assert error signals responsive to mismatches between the third stream of data samples and at least one of the first and second streams of data samples.