Integrated circuit

An integrated circuit comprising:

• transmitting circuitry, which, in operation, controls transmission of control information indicating a number of bits;
• and
• receiving circuitry, which, in operation, controls reception of a bit sequence, in which each of the number of bits indicated by the control information of a plurality of bits is forcibly set to a 1 and which is modulated by mapping the plurality of bits on a single modulation mapper, wherein the plurality of bits forms a modulation symbol in the bit sequence, and the single modulation mapper has first signal points,
• wherein each of the number of bits is forcibly set to the 1 in a way that the plurality of bits are mapped to one of second signal points, which are a part of the first signal points, such that said modulation symbol is detected by positive or negative decision only with respect to at least one of an I-axis and a Q-axis in the single modulation mapper.

An integrated circuit comprising:

• at least one output;
• and
• circuitry coupled to the at least one output, wherein the circuitry, in operation:
• controls transmission of control information indicating a number of bits;
• and
• controls reception of a bit sequence, in which each of the number of bits indicated by the control information of a plurality of bits is forcibly set to a 1 and which is modulated by mapping the plurality of bits on a single modulation mapper, wherein the plurality of bits forms a modulation symbol in the bit sequence, and the single modulation mapper has first signal points,
• wherein each of the number of bits is forcibly set to the 1 in a way that the plurality of bits are mapped to one of second signal points, which are a part of the first signal points, a distance between the second signal points being equivalent to a largest of distances existing among the first signal points in an I-Q plane of the single modulation mapper.

An integrated circuit comprising:

• at least one output;
• and
• circuitry coupled to the at least one output, wherein the circuitry, in operation:
• controls transmission of control information indicating a number of bits;
• and
• controls reception of a bit sequence, in which each of the number of bits indicated by the control information of a plurality of bits is forcibly set to a 1 and which is modulated by mapping the plurality of bits on a single modulation mapper, wherein the plurality of bits forms a modulation symbol in the bit sequence, and the single modulation mapper has first signal points,
• wherein each of the number of bits is forcibly set to the 1 in a way that the plurality of bits are mapped to one of second signal points, which are a part of the first signal points, such that said modulation symbol is detected by positive or negative decision only with respect to at least one of an I-axis and a Q-axis in the single modulation mapper.