Apparatuses and methods for duty cycle adjustment

An apparatus comprising:

• a phase mixer configured to receive first and second clock signals and a control word and provide a first output clock signal to a first node responsive, at least in part, to the first and second clock signals and the control word,
• a duty cycle adjuster circuit configured to receive the first and second clock signals, the control word and a clock sequence signal, the clock sequence signal indicating a phase relationship between the first and second clock signals, the duty cycle adjuster circuit further configured to provide a second output clock signal to the first node responsive, at least in part, to the first and second clock signals, the control word and the clock sequence signal, wherein the duty cycle adjuster circuit comprises:
• a control circuit configured to receive the control word and the clock sequence signal and produce a plurality of control signals responsive, at least in part, to the control word and the clock sequence signal, and
• an adjuster configured to receive the first and second clock signals and the plurality of control signals and produce the second output signal responsive, at least in part, to the first and second clock signals and the plurality of control signals.

A method, comprising:

• providing a first output signal based, at least in part, on first and second clock signals and a control word;
• providing a second output signal based, at least in part, on the first and second clock signals, the control word, and a clock sequence signal;
• and
• combining the first and second output signals, wherein combining the first and second output signals reduces a duty cycle variation of the first output signal.