Self-powered DC solid state circuit breakers

#The present invention relates in general to solid-state circuit breakers and, more particularly, to a family of semiconductor switches with self-powered auxiliary circuits that interrupt short circuit fault currents in DC power systems.

#DC power systems are gaining more popularity with increased DC loads (IT equipment, variable speed motor drives, LED lighting, etc.), renewable power generation (photovoltaic, wind, etc.), and distributed energy resources (batteries, fuel cells, microturbines, small gas generators). This is especially true for data centers, residential/commercial buildings, shipboard power systems, and high voltage DC transmission systems (HVDC), for example as described in “Low-Voltage DC Distribution System for Commercial Power Systems With Sensitive Electronic Loads,” D. Salomonsson and A. Sannino, IEEE Trans. Power Delivery, Vol. 22, No. 3, pp. 1620-1626, July 2007. DC power architectures improve energy efficiency by eliminating several conversion stages between AC/DC required in AC power systems. However, one major technical challenge for DC systems is to provide circuit breaker (CB) protection in the event of short circuit faults.

#Electromechanical DC circuit breaker products are available from companies like ABB, Eaton, and Schneider Electric, but suffer from slow action, typically with a response time of 30-100 milliseconds, and limited lifetime due to arcing. DC solid-state circuit breaker (SSCB) solutions were also developed to provide a much faster response time, typically with a response time of tens to hundreds of microseconds, and a much longer lifetime. Power semiconductor switching devices such as silicon IGBTs or thyristors, and more recently silicon carbide (SiC) JEFTs (Junction Effect Transistors) or SITs (Static Induction Transistors) are often employed in these solutions. For further reference see: “Solid-state circuit breakers for Medium Voltage DC power,” Kempkes, M., Roth, I., Gaudreau, M., IEEE Electric Ship Technologies Symposium (ESTS), 2011, Page(s) 254-257; U.S. Patent Application Publication 2014/0029152 A1; U.S. Patent Application Publication 2013/0154391; and “SiC-SIT Circuit Breakers With Controllable Interruption Voltage for 400-V DC Distribution Systems,” Y. Sato et al., IEEE Tran. Power Electronics, Vol. 29, No. 5, May 2014, Page(s):2597-2605.

#FIG. 1 shows a unidirectional solid-state circuit breaker including an asymmetrical normally-on JFET according to an embodiment of this invention.

#FIG. 2 shows a unidirectional solid-state circuit breaker including an asymmetrical normally-on gallium nitride (GaN) High Electron Mobility Transistor (HEMT) according to an embodiment of this invention.

#FIG. 3 shows a bidirectional solid-state circuit breaker including a plurality of asymmetrical normally-on JFETs with drain terminals connected according to an embodiment of this invention.

#A solid-state DC circuit breaker of this invention is connected between a voltage source and load. The solid-state circuit breaker preferably includes a solid-state switch and a voltage sensing and power supply circuit including a voltage sensing element and a DC-DC converter. In operation, when a short occurs between the voltage source and the load, the voltage sensing element generates a reverse biasing voltage through the DC-DC converter, turning off the solid-state switch and protecting the circuit.

#FIG. 1 illustrates a unidirectional solid-state circuit breaker (SSBC) 10 using an asymmetrical normally-on JFET 12 according to one embodiment of this invention. The unidirectional SSCB 10 comprises a normally-on asymmetric semiconductor JFET (Q1) 12 and a voltage sensing and power supply circuit 14. The voltage sensing and power supply circuit 14 includes a blocking diode (D1) 16 and a first resistor (R1) 18 and a second resistor (R2) 20, an isolated DC-DC converter 22, a capacitor (C1) 24, and a metal-oxide varistor (MOV) 26. The JFET (Q1) 12 has a drain 28, a source 30, and a gate terminal 32 with the main current flowing from the drain 28 to the source 30. The voltage sensing and power supply circuit 14, the capacitor (C1) 24, and the MOV 26 are connected between the drain 28 and the source 30 of the JEFT Q1. Input terminals 34 of the isolated DC-DC converter 22 are connected across the second resistor (R2) 20 of the voltage sensing and power supply circuit 14. Output terminals 36 of the isolated DC-DC converter 22 are connected between the source 30 and the gate 32 of the JFET 12 through a second blocking diode (D2) 38. The unidirectional SSCB 10 of this invention is preferably used in a DC power system (not shown) with the drain 28 of the JFET (Q1) 12 connected to a power supply (not shown), and the source 30 of JFET (Q1) 12 connected to a load element (not shown). When the normally-on JFET (Q1) 12 conducts a normal load current from the drain 28 to the source 30, a drain-source voltage of the JFET (Q1) 12 and a voltage across the second resistor (R2) 20 are both very small. An input voltage and an output voltage of the isolated DC/DC converter are also negligible. Therefore, there is no reverse biasing voltage applied between the gate 32 and source 30. The JFET (Q1) 12 remains in an on state. When the load is shorted, the voltage between the drain 28 and the source 30 of the JFET (Q1) 12 increases rapidly, causing a large voltage built across the second resistor (R2) 20 and leading to a large reverse biasing voltage between the gate 32 and source 30 of the JFET (Q1) 12. The normally-on JFET (Q1) 12 will turn off and block currents from the power supply with a large negative gate-source biasing voltage, typically 10-40 volts, and thus provide protection against short circuit faults. The MOV 26 is used to clamp a voltage spike between the drain 28 and the source 30 of the JFET (Q1) 12 caused by a parasitic inductance in the circuit when a fault current is interrupted.

#FIG. 2 illustrates a unidirectional solid-state circuit breaker 40 using an asymmetrical normally-on gallium nitride (GaN) High Electron Mobility Transistor (HEMT) 42 according to one embodiment of this invention. The unidirectional SSCB 40 comprises the normally-on asymmetric semiconductor HEMT (Q1) 42, a voltage sensing and power supply circuit 44 having a blocking diode (D1) 46, a first resistor (R1) 48 and a second resistor (R2) 50, an isolated DC-DC converter 52, a capacitor (C1) 54, and a metal-oxide varistor (MOV) 56. The HEMT (Q1) 42 includes a drain 58, a source 60, and a gate terminal 62 with a main current flowing from the drain 58 to the source 60. The voltage sensing and power supply circuit 44, the capacitor (C1) 54, and the MOV 56 are connected between the drain 58 and the source 60 of the HEMT (Q1) 42. Input terminals 64 of the isolated DC-DC converter 52 are connected across the second resistor (R2) 50 of the voltage sensing and power supply circuit 44. Output terminals 66 of the isolated. DC-DC converter 52 are connected between the source 60 and the gate 62 of the HEMT 42 through a second blocking diode (D2) 68. The unidirectional SSCB 40 is preferably used in a DC power system with the drain 58 of Q1 connected to a power supply, and the source 60 of Q1 connected to a load element. When the normally-on HEMT (Q1) 42 conducts a normal load current from the drain 58 to the source 60, a drain-source voltage of Q1 and a voltage across the second resistor (R2) 50 are both very small. An input voltage and an output voltage of the isolated DC/DC converter 52 are also negligible. Therefore, there is no reverse biasing voltage applied between the gate 62 and the source 60 of the HEMT (Q1) 42. The HEMT (Q1) 42 remains in an on state. When the load is shorted, the voltage between the drain 58 and the source 60 of the HEMT (Q1) 42 increases rapidly, causing a large voltage built across the second resistor (R2) 50 and leading to a large reverse biasing voltage between the gate 62 and the source 60 of the HEMT (Q1) 42. The normally-on HEMT (Q1) 42 will turn off and block currents from a power supply with a large negative gate-source biasing voltage, and thus provide protection against short circuit faults. The MOV 56 is used to clamp a voltage spike between the drain 58 and the source 60 of the HEMT (Q1) 42 caused by a parasitic inductance in the circuit when the fault current is interrupted.