Variable resistance material layers and variable resistance memory devices including the same

A variable resistance material layer, comprising germanium (Ge), antimony (Sb), tellurium (Te), and at least two types of impurities, wherein one of the at least two types of impurities is represented by X and the other is represented by Y,

• wherein the variable resistance material layer has a composition represented by a chemical formula of XpYq(GeaSb(1-a-b)-Teb)(1-p-q),
• and wherein a sum of atomic concentrations of X and Y is in a range of 0<p+q≦0.2,
• an atomic concentration of Ge is in a range of 0.05≦a<0.19,
• an atomic concentration of Te is in a range of 0.42≦b≦0.56,
• wherein the variable resistance material layer has a shape of a pillar,
• wherein a sum of top and bottom surface areas of the pillar is defined as M and an area of a sidewall of the pillar is defined as D, and
• wherein D is equal to or more than three times that of M.

A phase-change random access memory (PRAM) device, comprising:

• a lower electrode on a substrate;
• a variable resistance material layer pattern on the lower electrode;
• and
• an upper electrode on the variable resistance material layer pattern,
• wherein the variable resistance material layer pattern includes germanium (Ge), antimony (Sb), tellurium (Te), and at least one type of impurities (X), and has a composition represented by a chemical formula of Xp(GeaSb(1-a-b)Teb)(1-p),
• wherein an atomic concentration of X is in a range of 0<p≦0.2,
• an atomic concentration of germanium (Ge) is in a range of 0.05≦a<0.19,
• and an atomic concentration of tellurium (Te) is in a range of 0.42≦b≦0.56,
• wherein a sum of areas of portions of the variable resistance material layer pattern contacting the upper and lower electrodes, respectively, is defined as M,
• an area of the sidewall of the variable resistance material layer pattern contacting the insulation layer is defined as D, and
• wherein D is equal to or more than about three times that of M.