High density vertical nanowire stack for field effect transistor

A semiconductor structure comprising:

• at least one semiconductor nanowire pair located over a substrate, wherein each of said at least one semiconductor nanowire pair includes:
• a lower semiconductor nanowire having a vertical cross-sectional shape of an upright triangle;
• and
• an upper semiconductor nanowire having a vertical cross-sectional shape of an inverted triangle:
• a semiconductor material source structure having a rectangular vertical cross-sectional shape adjoined to said lower semiconductor nanowire and said upper semiconductor nanowire;
• a semiconductor material drain structure having another rectangular vertical cross-sectional shape adjoined to said lower semiconductor nanowire and said upper semiconductor nanowire;
• a source cap material portion located on said semiconductor material source structure;
• a drain cap material portion located on said semiconductor material drain structure, said source cap material portion is spaced apart from said drain cap material portion;
• a raised source region in direct physical contact with a sidewall surface of each of said semiconductor material source structure and said source cap material portion and extending onto a topmost surface of said source cap material portion;
• and
• a raised drain region in direct physical contact with a sidewall surface of each of said semiconductor material drain structure and said drain cap material portion and extending onto a topmost surface of said drain cap material portion.