Method for growing III-V epitaxial layers and semiconductor structure
AssigneeEpiGaN NV
InventorsJoff Derluyn, Stefan Degroote, Marianne Germain
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AssigneeEpiGaN NV
InventorsJoff Derluyn, Stefan Degroote, Marianne Germain
Estimating the term…
Disclosed are methods of growing III-V epitaxial layers on a substrate, a semiconductor structure comprising a substrate, a device comprising such a semiconductor structure, and an electronic circuit. Group III-nitride devices, such as, for example, high-electron-mobility transistors, may include a two-dimensional electron gas (2DEG) between two active layers. For example, the 2DEG may be between a GaN layer and a AlGaN layer. These transistors may work in depletion-mode operation, which means the channel has to be depleted to turn the transistor off. For certain applications, such as, for example, power switching or integrated logic, negative polarity gate supply is undesired. Transistors may then work in enhancement mode (E-mode).
A method of manufacturing a semiconductor III-V structure, comprising:
The method of 7, wherein the gate comprises one or more of N, P, or As, and one or more of B, Al, Ga, In, or Tl.
A semiconductor structure comprising:
Dependencies are inferred from the claim text.