Trench-type insulated gate semiconductor device including an emitter trench and an overlapped floating region

A semiconductor device, comprising:

• a semiconductor layer;
• a plurality of gate trenches formed in the semiconductor layer;
• a gate electrode filled in the plurality of gate trenches;
• a gate insulating film provided between the gate electrode and the semiconductor layer;
• an n+-type emitter region, a p-type base region, and an n−-type drift region disposed, lateral to each gate trench, in order in a depth direction of the gate trench from a front surface side of the semiconductor layer;
• a p+-type collector region disposed on a back surface side of the semiconductor layer with respect to the n−-type drift region;
• a plurality of emitter trenches formed between the plurality of gate trenches adjacent to each other, an emitter trench, which is closest to one gate trench of the plurality of gate trenches, facing the one gate trench across the n−-type drift region throughout from the front surface side of the semiconductor layer to a deepest portion of the emitter trench;
• a buried electrode filled in the plurality of emitter trenches with an insulating film between the buried electrode and the semiconductor layer, electrically connected with the n+-type emitter region;
• and
• a p-type floating region formed between the plurality of emitter trenches, wherein
• the p-type floating region is formed deeper than the p-type base region, and includes an overlap portion that goes around to a lower side of the emitter trench closest to the gate trench out of the plurality of emitter trenches and has an end portion positioned on a side closer to the gate trench with respect to a center in a width direction of the emitter trench.