Corner layout for high voltage semiconductor devices

A method of forming a semiconductor device, comprising:

• forming a doped layer;
• forming an active cell region having a plurality of active cell device structures having a first end and a second end formed in the doped layer and arranged as striped cells;
• and
• forming a termination region having a plurality of termination device structures formed in the doped layer surrounding the active cell region, wherein the termination device structures include one or more termination concentric ring arrays, wherein an innermost ring array of termination device structures has a plurality of spurs extending inward toward the active cell region, wherein a distance between each of the spurs and a nearby striped cell is configured to maximize the breakdown voltage of the device;
• wherein a first subset of the striped cells are configured to maximize a breakdown voltage of the semiconductor device by having the ends of each striped cell array spaced a uniform distance from a nearest termination device structure;
• and
• wherein a second subset of the striped cells proximate to a corner region of the active cell region are configured to maximize the breakdown voltage by spacing the ends of each striped cell array in the second subset a non-uniform distance from the nearest termination device structure;
• and
• wherein the second subset of striped cells include arcuate end portions;
• and
• wherein the arcuate end portions are in the shape of concentric quarter circles.