Production of spacers at flanks of a transistor gate

A method for producing spacers at flanks of a transistor gate, the gate being situated above a layer of a semiconductor material, the method comprising successively the following steps:

• forming a dielectric layer that covers the gate and at least a peripheral region of the layer of semiconductor material surrounding the gate;
• anisotropic etching of the dielectric layer, thereby reducing a thickness of the dielectric layer at a region covering an upper surface of the gate and at the peripheral region, while substantially preserving a thickness of the dielectric layer at the flanks;
• forming a superficial layer covering the dielectric layer;
• partial etching of the superficial layer configured so as to completely remove the superficial layer at the peripheral region while preserving a residual part of the superficial layer at the flanks, and while at least partly preserving the dielectric layer at the peripheral region;
• and
• then, after the partial etching, selectively etching the dielectric layer with respect to the residual part of the superficial layer and with respect to the layer of semiconductor material.