MIM/RRAM structure with improved capacitance and reduced leakage current
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsJian-Shiou Huang, Yao-Wen Chang, Hsing-Lien Lin, Cheng-Yuan Tsai, Chia-Shiung Tsai
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Abstract
Some embodiments of the present disclosure provide an integrated circuit (IC) device including a metal-insulator-metal (MIM) capacitor structure. The MIM capacitor structure includes a lower metal capacitor electrode, an upper metal capacitor electrode, and a capacitor dielectric separating the lower metal capacitor electrode from the upper metal capacitor electrode. The capacitor dielectric is made up of an amorphous oxide/nitride matrix and a plurality of metal or metal oxide/nitride nano-particles that are randomly distributed over the volume of amorphous oxide/nitride matrix.
Claims20
A method of forming a metal-insulator-metal (MIM) capacitor:
- providing a semiconductor substrate with a plurality of semiconductor devices arranged thereon, wherein an interconnect structure, which comprises a plurality of conductive and insulating layers that are formed one over another in alternating fashion, is formed over the semiconductor substrate to couple semiconductor devices to one another;
- forming a conductive lower capacitor electrode over the interconnect structure;
- performing a co-sputtering process to form a capacitor dielectric over the conductive lower capacitor electrode, wherein performing the co-sputtering process comprises sputtering an elemental material from a target that is a pure element, such that oxide or nitride forms on the conductive lower capacitor electrode from the elemental material;
- and
- forming a conductive upper capacitor electrode over the capacitor dielectric.
A method of forming an integrated circuit (IC), the method comprising:
- forming a lower TiN electrode;
- forming an amorphous SiO2 or amorphous Al2O3 dielectric, which has a thickness of less than approximately one hundred angstroms and a dielectric constant of greater than twenty, over the lower TiN electrode, wherein a plurality of metal or metal nitride nano-particles, which have individual diameters of less than approximately ten nanometers, are randomly distributed over an entire volume of the amorphous SiO2 or amorphous Al2O3 dielectric;
- and
- forming an upper TiN electrode over the amorphous SiO2 or amorphous Al2O3 dielectric.
A method, comprising:
- providing a semiconductor substrate with a plurality of semiconductor devices arranged thereon, wherein an interconnect structure, which comprises a plurality of conductive lines and vias within a dielectric structure, is formed over the semiconductor substrate to couple semiconductor devices to one another;
- forming a conductive lower electrode over the interconnect structure;
- and
- performing a co-sputtering process to form a dielectric directly over the conductive lower electrode, wherein during the co-sputtering process a dielectric material and a conductive material are concurrently sputtered from different targets, and nano-particles of metal oxide or of metal nitride form on the conductive lower electrode from the conductive material, to form the dielectric, wherein the dielectric has a linear relationship between an electric field applied thereto and polarization induced therein by the electric field, and wherein the conductive material is an elemental metal.
Dependencies are inferred from the claim text.