Back to results
US 9,543,308 B2Granted
Semiconductor device
AssigneeSamsung Electronics Co., Ltd.
InventorsHoon Park, Young-Seok Kim, Yeong-Cheol Lee
Life of this patent
Estimating the term…
Abstract
A semiconductor device includes a bit line structure on a substrate, the bit line structure having a polysilicon layer pattern doped with impurities, and a metal layer pattern on the polysilicon layer pattern, a first spacer surrounding and contacting a sidewall of the bit line structure, the first spacer having a constant thickness, and a capacitor contact structure on the substrate, an air gap being defined between the capacitor contact structure and the first spacer.
Claims19
A semiconductor device, comprising:
- a bit line structure on a substrate, the bit line structure including:
- a polysilicon layer pattern doped with impurities, and
- a metal layer pattern on the polysilicon layer pattern;
- a first spacer surrounding and contacting a sidewall of the bit line structure, the first spacer having a constant thickness;
- a capacitor contact structure on the substrate, an air gap being defined between the capacitor contact structure and the first spacer;
- and
- a capacitor on the capacitor contact structure.
4 more elements
A semiconductor device, comprising:
- a bit line structure on a substrate, the bit line structure including:
- a polysilicon layer pattern doped with impurities, and
- a metal layer pattern on the polysilicon layer pattern;
- a first spacer surrounding and contacting a sidewall of the bit line structure;
- a capacitor contact structure on the substrate;
- an air gap between the capacitor contact structure and the first spacer, the air gap being in direct contact with the first spacer;
- and
- a second spacer surrounding a lower sidewall of the capacitor contact structure, the air gap being between the first and second spacer.
5 more elements
A semiconductor device, comprising:
- a bit line structure on a substrate, the bit line structure including:
- a polysilicon layer pattern doped with impurities, and
- a metal layer pattern on the polysilicon layer pattern;
- a first spacer including nitride on a sidewall of the bit line structure, the first spacer having a constant thickness at least on sidewalls of the polysilicon layer pattern and the metal layer pattern, and the first spacer continuously covering the entire sidewall of the bit line structure;
- and
- a capacitor contact structure on the substrate, an air gap being defined between the capacitor contact structure and the first spacer.
3 more elements
Dependencies are inferred from the claim text.