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US 9,543,222 B2Granted
Methods for measuring the full well capacity of CMOS image sensors
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsKai-Ling Chiu, Tse-Hua Lu, Yu-Kuo Cheng, Po-Chun Chiu, Ping-Fang Hung
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Abstract
An integrated circuit device includes a transfer-gate transistor, and a photo diode connected to a source/drain region of the transfer-gate transistor. An electrical fuse is electrically coupled to a gate of the transfer-gate transistor. A diode is electrically coupled to the electrical fuse.
Claims20
A method comprising:
- forming a test structure comprising:
- a transfer-gate transistor at a front surface of a semiconductor substrate;
- a photo diode in the semiconductor substrate, wherein the photo diode is connected to a first source/drain region of the transfer-gate transistor;
- a floating diffusion capacitor, wherein the floating diffusion capacitor is connected to a second source/drain region of the transfer-gate transistor;
- and
- an electrical fuse electrically coupled to a gate of the transfer-gate transistor burning the electrical fuse;
- and
- after the electrical fuse is burned, measuring a full well capacity of the test structure.
5 more elements
A method comprising:
- performing a front-side process on a wafer, wherein the front-side process comprises:
- forming transistors and diodes, with portions of the transistors and diodes in a semiconductor substrate;
- and
- forming an interconnect structure comprising metal lines and vias electrically coupling to the transistors and diodes, wherein the interconnect structure is on a front side of the semiconductor substrate;
- after the front-side process, burning an electrical fuse to disconnect a test structure in the wafer from an electrical ground, wherein the test structure comprises an image sensor pixel unit;
- and
- after the burning the electrical fuse, measuring a full well capacity of the image sensor pixel unit.
4 more elements
A method comprising:
- forming a test structure comprising:
- forming a first transfer-gate transistor at a front side of a semiconductor substrate;
- forming a first photo diode connected to a first source/drain region of the first transfer-gate transistor;
- forming a first floating diffusion capacitor, wherein the first floating diffusion capacitor is connected to a second source/drain region of the first transfer-gate transistor;
- and
- forming an electrical fuse and a diode serially coupled between a gate of the first transfer-gate transistor and a electrical ground;
- forming an image sensor array comprising forming a pixel unit, wherein the forming the pixel unit comprises:
- forming a second transfer-gate transistor at the front side of the semiconductor substrate, wherein no electrical fuse is connected to a gate of the second transfer-gate transistor;
- forming a second photo diode connected to a third source/drain region of the second transfer-gate transistor;
- and
- forming a second floating diffusion capacitor, wherein the second floating diffusion capacitor is connected to a fourth source/drain region of the second transfer-gate transistor;
- burning the electrical fuse;
- and
- after the electrical fuse is burned, measuring a full well capacity of the test structure.
11 more elements
Dependencies are inferred from the claim text.